Manuel E. Acacio

	2012
65		José L. Abellán, Juan Fernández Peinador, Manuel E. Acacio, Davide Bertozzi, Daniele Bortolotti, Andrea Marongiu, Luca Benini: Design of a collective communication infrastructure for barrier synchronization in cluster-based nanoscale MPSoCs. DATE 2012: 491-496
64		Anurag Negi, J. Rubén Titos Gil, Manuel E. Acacio, José M. García, Per Stenström: π-TM: Pessimistic invalidation for scalable lazy hardware transactional memory. HPCA 2012: 141-152
63		Epifanio Gaona-Ramírez, J. Rubén Titos Gil, Manuel E. Acacio, Juan Fernández: Dynamic Serialization: Improving Energy Consumption in Eager-Eager Hardware Transactional Memory Systems. PDP 2012: 221-228
62		Alberto Ros, Blas Cuesta Saez, Ricardo Fernández Pascual, María Engracia Gómez, Manuel E. Acacio, Antonio Robles, José M. García, José Duato: Extending Magny-Cours Cache Coherence. IEEE Trans. Computers 61(5): 593-606 (2012)
61		J. Rubén Titos Gil, Manuel E. Acacio, José M. García, Tim Harris, Adrián Cristal, Osman S. Unsal, Ibrahim Hur, Mateo Valero: Hardware transactional memory with software-defined conflicts. TACO 8(4): 31 (2012)
	2011
60		Anurag Negi, J. Rubén Titos Gil, Manuel E. Acacio, José M. García, Per Stenström: Eager Meets Lazy: The Impact of Write-Buffering on Hardware Transactional Memory. ICPP 2011: 73-82
59		J. Rubén Titos Gil, Anurag Negi, Manuel E. Acacio, José M. García, Per Stenström: ZEBRA: a data-centric, hybrid-policy hardware transactional memory design. ICS 2011: 53-62
58		José L. Abellán, Juan Fernández, Manuel E. Acacio: GLocks: Efficient Support for Highly-Contended Locks in Many-Core CMPs. IPDPS 2011: 893-905
57		Anurag Negi, J. Rubén Titos Gil, Manuel E. Acacio, José M. García, Per Stenström: The Impact of Non-coherent Buffers on Lazy Hardware Transactional Memory Systems. IPDPS Workshops 2011: 700-707
56		Anurag Negi, Per Stenström, J. Rubén Titos Gil, Manuel E. Acacio, José M. García: Pi-TM: Pessimistic Invalidation for Scalable Lazy Hardware Transactional Memory. PACT 2011: 203-204
	2010
55		José L. Abellán, Juan Fernández, Manuel E. Acacio: Efficient and scalable barrier synchronization for many-core CMPs. Conf. Computing Frontiers 2010: 73-74
54		Alberto Ros, Manuel E. Acacio: Evaluation of Low-Overhead Organizations for the Directory in Future Many-Core CMPs. Euro-Par Workshops 2010: 87-97
53		Alberto Ros, Blas Cuesta, Ricardo Fernández Pascual, María Engracia Gómez, Manuel E. Acacio, Antonio Robles, José M. García, José Duato: EMC2: Extending Magny-Cours coherence for large-scale servers. HiPC 2010: 1-10
52		José L. Abellán, Juan Fernández, Manuel E. Acacio: A G-Line-Based Network for Fast and Efficient Barrier Synchronization in Many-Core CMPs. ICPP 2010: 267-276
51		Antonio Flores, Juan L. Aragón, Manuel E. Acacio: Energy-Efficient Hardware Prefetching for CMPs Using Heterogeneous Interconnects. PDP 2010: 147-154
50		Epifanio Gaona-Ramírez, J. Rubén Titos Gil, Juan Fernández, Manuel E. Acacio: Characterizing Energy Consumption in Hardware Transactional Memory Systems. SBAC-PAD 2010: 9-16
49		Antonio Flores, Juan L. Aragón, Manuel E. Acacio: Heterogeneous Interconnects for Energy-Efficient Message Management in CMPs. IEEE Trans. Computers 59(1): 16-28 (2010)
48		Alberto Ros, Manuel E. Acacio, José M. García: A Direct Coherence Protocol for Many-Core Chip Multiprocessors. IEEE Trans. Parallel Distrib. Syst. 21(12): 1779-1792 (2010)
47		Ricardo Fernández Pascual, José M. García, Manuel E. Acacio, José Duato: Dealing with Transient Faults in the Interconnection Network of CMPs at the Cache Coherence Level. IEEE Trans. Parallel Distrib. Syst. 21(8): 1117-1131 (2010)
46		Alberto Ros, Manuel E. Acacio, José M. García: A scalable organization for distributed directories. Journal of Systems Architecture - Embedded Systems Design 56(2-3): 77-87 (2010)
45		Antonio Flores, Manuel E. Acacio, Juan L. Aragón: Exploiting address compression and heterogeneous interconnects for efficient message management in tiled CMPs. Journal of Systems Architecture - Embedded Systems Design 56(9): 429-441 (2010)
44		José L. Abellán, Juan Fernández, Manuel E. Acacio: Characterizing the basic synchronization and communication operations in Dual Cell-based Blades through CellStats. The Journal of Supercomputing 53(2): 247-268 (2010)
	2009
43		Alberto Ros, Manuel E. Acacio, José M. García: Dealing with Traffic-Area Trade-Off in Direct Coherence Protocols for Many-Core CMPs. APPT 2009: 11-27
42		Epifanio Gaona-Ramírez, Juan Fernández, Manuel E. Acacio: Fast and Efficient Synchronization and Communication Collective Primitives for Dual Cell-Based Blades. Euro-Par 2009: 900-911
41		Alberto Ros, Marcelo Cintra, Manuel E. Acacio, José M. García: Distance-aware round-robin mapping for large NUCA caches. HiPC 2009: 79-88
40		J. Rubén Titos Gil, Manuel E. Acacio, José M. García Carrasco: Speculation-based conflict resolution in hardware transactional memory. IPDPS 2009: 1-12
39		Joaquín Franco, Gregorio Bernabé, Juan Fernández, Manuel E. Acacio: A Parallel Implementation of the 2D Wavelet Transform Using CUDA. PDP 2009: 111-118
	2008
38		Alberto Ros, Manuel E. Acacio, José M. García: Scalable Directory Organization for Tiled CMP Architectures. CDES 2008: 112-118
37		Juan Fernández, Manuel E. Acacio, Gregorio Bernabé, José L. Abellán, Joaquín Franco: Multicore Platforms for Scientific Computing: Cell BE and NVIDIA Tesla. CSC 2008: 167-173
36		Ricardo Fernández Pascual, José M. García, Manuel E. Acacio, José Duato: A fault-tolerant directory-based cache coherence protocol for CMP architectures. DSN 2008: 267-276
35		J. Rubén Titos Gil, Manuel E. Acacio, José M. García: Directory-Based Conflict Detection in Hardware Transactional Memory. HiPC 2008: 541-554
34		Ricardo Fernández Pascual, José M. García, Manuel E. Acacio, José Duato: Fault-Tolerant Cache Coherence Protocols for CMPs: Evaluation and Trade-Offs. HiPC 2008: 555-568
33		José L. Abellán, Juan Fernández, Manuel E. Acacio: Characterizing the Basic Synchronization and Communication Operations in Dual Cell-Based Blades. ICCS (1) 2008: 456-465
32		Antonio Flores, Manuel E. Acacio, Juan L. Aragón: Address Compression and Heterogeneous Interconnects for Energy-Efficient High-Performance in Tiled CMPs. ICPP 2008: 295-303
31		Alberto Ros, Manuel E. Acacio, José M. García: DiCo-CMP: Efficient cache coherency in tiled CMP architectures. IPDPS 2008: 1-11
30		José L. Abellán, Juan Fernández, Manuel E. Acacio: CellStats: A Tool to Evaluate the Basic Synchronization and Communication Operations of the Cell BE. PDP 2008: 261-268
29		J. Rubén Titos Gil, Manuel E. Acacio, José M. García Carrasco: Characterization of Conflicts in Log-Based Transactional Memory (LogTM). PDP 2008: 30-37
28		Ricardo Fernández Pascual, José M. García, Manuel E. Acacio, José Duato: Extending the TokenCMP Cache Coherence Protocol for Low Overhead Fault Tolerance in CMP Architectures. IEEE Trans. Parallel Distrib. Syst. 19(8): 1044-1056 (2008)
27		Alberto Ros, Ricardo Fernández Pascual, Manuel E. Acacio, José M. García: Two proposals for the inclusion of directory information in the last-level private caches of glueless shared-memory multiprocessors. J. Parallel Distrib. Comput. 68(11): 1413-1424 (2008)
26		Antonio Flores, Juan L. Aragón, Manuel E. Acacio: An energy consumption characterization of on-chip interconnection networks for tiled CMP architectures. The Journal of Supercomputing 45(3): 341-364 (2008)
	2007
25		Antonio Flores, Juan L. Aragón, Manuel E. Acacio: Sim-PowerCMP: A Detailed Simulator for Energy Consumption Analysis in Future Embedded CMP Architectures. AINA Workshops (1) 2007: 752-757
24		Ricardo Fernández Pascual, José M. García, Manuel E. Acacio, José Duato: A Low Overhead Fault Tolerant Coherence Protocol for CMP Architectures. HPCA 2007: 157-168
23		Antonio Flores, Juan L. Aragón, Manuel E. Acacio: Efficient Message Management in Tiled CMP Architectures Using a Heterogeneous Interconnection Network. HiPC 2007: 133-146
22		Alberto Ros, Manuel E. Acacio, José M. García: Direct Coherence: Bringing Together Performance and Scalability in Shared-Memory Multiprocessors. HiPC 2007: 147-160
21		Gregorio Bernabé, Ricardo Fernández Pascual, José M. García, Manuel E. Acacio, José González: An efficient implementation of a 3D wavelet transform based encoder on hyper-threading technology. Parallel Computing 33(1): 54-72 (2007)
	2006
20		Alberto Ros, Manuel E. Acacio, José M. García: An efficient cache design for scalable glueless shared-memory multiprocessors. Conf. Computing Frontiers 2006: 321-330
19		Francisco J. Villa, Manuel E. Acacio, José M. García: On the Evaluation of Dense Chip-Multiprocessor Architectures. ICSAMOS 2006: 21-27
	2005
18		Alberto Ros, Manuel E. Acacio, José M. García: A Novel Lightweight Directory Architecture for Scalable Shared-Memory Multiprocessors. Euro-Par 2005: 582-591
17		Francisco J. Villa, Manuel E. Acacio, José M. García: Memory Subsystem Characterization in a 16-Core Snoop-Based Chip-Multiprocessor Architecture. HPCC 2005: 213-222
16		Ricardo Fernández Pascual, José M. García, Gregorio Bernabé, Manuel E. Acacio: Optimizing a 3D-FWT Video Encoder for SMPs and HyperThreading Architectures. PDP 2005: 76-83
15		Manuel E. Acacio, José González, José M. García, José Duato: A Two-Level Directory Architecture for Highly Scalable cc-NUMA Multiprocessors. IEEE Trans. Parallel Distrib. Syst. 16(1): 67-79 (2005)
14		Francisco J. Villa, Manuel E. Acacio, José M. García: Evaluating IA-32 web servers through simics: a practical experience. Journal of Systems Architecture 51(4): 251-264 (2005)
	2004
13		Francisco J. Villa, Manuel E. Acacio, José M. García: On the Evaluation of x86 Web Servers Using Simics: Limitations and Trade-Offs. International Conference on Computational Science 2004: 541-544
12		Manuel E. Acacio, José González, José M. García, José Duato: An Architecture for High-Performance Scalable Shared-Memory Multiprocessors Exploiting On-Chip Integration. IEEE Trans. Parallel Distrib. Syst. 15(8): 755-768 (2004)
	2002
11		Manuel E. Acacio, José González, José M. García, José Duato: The Use of Prediction for Accelerating Upgrade Misses in cc-NUMA Multiprocessors. IEEE PACT 2002: 155-164
10		Manuel E. Acacio, José González, José M. García, José Duato: A Novel Approach to Reduce L2 Miss Latency in Shared-Memory Multiprocessors. IPDPS 2002
9		Manuel E. Acacio, José González, José M. García, José Duato: Reducing the Latency of L2 Misses in Shared-Memory Multiprocessors through On-Chip Directory Integration. PDP 2002: 368-375
8		Manuel E. Acacio, José González, José M. García, José Duato: Owner prediction for accelerating cache-to-cache transfer misses in a cc-NUMA architecture. SC 2002: 1-12
7		Manuel E. Acacio, Óscar Cánovas Reverte, José M. García, Pedro E. López-de-Teruel: MPI-Delphi: an MPI implementation for visual programming environments and heterogeneous computing. Future Generation Comp. Syst. 18(3): 317-333 (2002)
	2001
6		Manuel E. Acacio, José González, José M. García, José Duato: A New Scalable Directory Architecture for Large-Scale Multiprocessors. HPCA 2001: 97-106
	1999
5		Manuel E. Acacio, Óscar Cánovas Reverte, José M. García, Pedro E. López-de-Teruel: An Evaluation of Parallel Computing in PC Clusters with Fast Ethernet. ACPC 1999: 570-571
4		Pedro E. López-de-Teruel, José M. García, Manuel E. Acacio, Óscar Cánovas Reverte: P-EDR: An Algorithm for Parallel Implementation of Parzen Density Estimation from Uncertain Observations. IPPS/SPDP 1999: 563-568
3		Manuel E. Acacio, Pedro E. López-de-Teruel, José M. García, Óscar Cánovas Reverte: The MPI-Delphi Interface: A Visual Programming Environment for Clusters of Workstations. PDPTA 1999: 1730-1736
2		Pedro E. López-de-Teruel, José M. García, Manuel E. Acacio: The Parallel EM Algorithm and its Applications in Computer Vision. PDPTA 1999: 571-578
1		Manuel E. Acacio, José M. García, Pedro E. López-de-Teruel: A Performance Evaluation of P-EDR in Different Parallel Environments. PDPTA 1999: 744-750

Coauthor Index

1	José L. Abellán	[30] [33] [37] [44] [52] [55] [58] [65]
2	Juan L. Aragón	[23] [25] [26] [32] [45] [49] [51]
3	Luca Benini	[65]
4	Gregorio Bernabé	[16] [21] [37] [39]
5	Davide Bertozzi	[65]
6	Daniele Bortolotti	[65]
7	José M. García Carrasco	[29] [40]
8	Marcelo Cintra	[41]
9	Adrián Cristal	[61]
10	Blas Cuesta (Blas Cuesta Saez)	[53] [62]
11	José Duato (José Duato Marín)	[6] [8] [9] [10] [11] [12] [15] [24] [28] [34] [36] [47] [53] [62]
12	Antonio Flores	[23] [25] [26] [32] [45] [49] [51]
13	Joaquín Franco	[37] [39]
14	Epifanio Gaona-Ramírez	[42] [50] [63]
15	José M. García	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [24] [27] [28] [31] [34] [35] [36] [38] [41] [43] [46] [47] [48] [53] [56] [57] [59] [60] [61] [62] [64]
16	J. Rubén Titos Gil	[29] [35] [40] [50] [56] [57] [59] [60] [61] [63] [64]
17	María Engracia Gómez (María Engracia Gómez Requena)	[53] [62]
18	José González	[6] [8] [9] [10] [11] [12] [15] [21]
19	Tim Harris	[61]
20	Ibrahim Hur	[61]
21	Pedro E. López-de-Teruel	[1] [2] [3] [4] [5] [7]
22	Andrea Marongiu	[65]
23	Anurag Negi	[56] [57] [59] [60] [64]
24	Ricardo Fernández Pascual	[16] [21] [24] [27] [28] [34] [36] [47] [53] [62]
25	Juan Fernández Peinador (Juan Fernández)	[30] [33] [37] [39] [42] [44] [50] [52] [55] [58] [63] [65]
26	Óscar Cánovas Reverte (Oscar Cánovas Reverte)	[3] [4] [5] [7]
27	Antonio Robles	[53] [62]
28	Alberto Ros	[18] [20] [22] [27] [31] [38] [41] [43] [46] [48] [53] [54] [62]
29	Per Stenström	[56] [57] [59] [60] [64]
30	Osman S. Unsal (Osman S. Ünsal)	[61]
31	Mateo Valero	[61]
32	Francisco J. Villa	[13] [14] [17] [19]

Last update Thu May 24 01:13:30 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page