 | 2009 |
|---|
| 7 |       | Camille Leroux,
Christophe Jégo,
Patrick Adde,
Michel Jézéquel:
High-throughput Block Turbo Decoding: From Full-parallel Architecture to FPGA Prototyping.
Signal Processing Systems 57(3): 349-361 (2009) |
| 2008 |
|---|
| 6 | | Camille Leroux,
Christophe Jégo,
Patrick Adde,
Michel Jézéquel,
Deepak Gupta:
A highly parallel Turbo Product Code decoder without interleaving resource.
SiPS 2008: 1-6 |
| 2007 |
|---|
| 5 | | Raphaël Le Bidan,
Ramesh Pyndiah,
Patrick Adde:
Some Results on the Binary Minimum Distance of Reed-Solomon Codes and Block Turbo Codes.
ICC 2007: 990-994 |
| 4 | | Camille Leroux,
Christophe Jégo,
Patrick Adde,
Michel Jézéquel:
Towards Gb/s turbo decoding of product code onto an FPGA device.
ISCAS 2007: 909-912 |
| 2006 |
|---|
| 3 | | Erwan Piriou,
Christophe Jégo,
Patrick Adde,
Raphaël Le Bidan,
Michel Jézéquel:
Efficient architecture for Reed Solomon block turbo code.
ISCAS 2006 |
| 2 | | Erwan Piriou,
Christophe Jégo,
Patrick Adde,
Michel Jézéquel:
A Flexible Architecture For Block Turbo Decoders Using BCH Or Reed-Solomon Components Codes.
ISVLSI 2006: 430-431 |
| 1 |  | Erwan Piriou,
Christophe Jégo,
Patrick Adde,
Michel Jézéquel:
Design, Implementation and Prototyping of a Flexible Architecture Dedicated to Block Turbo Decoding.
ReCoSoC 2006: 152-159 |
