Aneesh Aggarwal

	2009
31		Tameesh Suri, Aneesh Aggarwal: Improving performance of simple cores by exploiting loop-level parallelism through value prediction and reconfiguration. Conf. Computing Frontiers 2009: 151-160
30		Saugata Ghose, Latoya Gilgeous, Polina Dudnik, Aneesh Aggarwal, Corey Waxman: Architectural support for low overhead detection of memory violations. DATE 2009: 652-657
29		Tameesh Suri, Aneesh Aggarwal: Improving Scalability and Per-Core Performance in Multi-Cores through Resource Sharing and Reconfiguration. VLSI Design 2009: 145-150
28		Sandeep Sirsi, Aneesh Aggarwal: Exploring the Limits of Port Reduction in Centralized Register Files. VLSI Design 2009: 535-540
27		Aneesh Aggarwal: Complexity Effective Bypass Networks. T. HiPEAC 2: 201-221 (2009)
	2008
26		Sumeet Kumar, Aneesh Aggarwal: Speculative instruction validation for performance-reliability trade-off. HPCA 2008: 405-414
25		Tameesh Suri, Aneesh Aggarwal: Scalable Multi-cores with Improved Per-core Performance Using Off-the-critical Path Reconfigurable Hardware. HiPC 2008: 365-377
24		Rajdeep Bhowmik, Chaitali Gupta, Madhusudhan Govindaraju, Aneesh Aggarwal: Optimizing XML processing for grid applications using an emulation framework. IPDPS 2008: 1-11
23		Prateek Pujara, Aneesh Aggarwal: Cache Noise Prediction. IEEE Trans. Computers 57(10): 1372-1386 (2008)
	2007
22		Prateek Pujara, Aneesh Aggarwal: Increasing cache capacity through word filtering. ICS 2007: 222-231
21		Rajdeep Bhowmik, Chaitali Gupta, Madhusudhan Govindaraju, Aneesh Aggarwal: Efficient XML-Based Grid Middleware Design for Multi-Core Processors. ICWS 2007: 1197-1198
	2006
20		Prateek Pujara, Aneesh Aggarwal: Increasing the cache efficiency by eliminating noise. HPCA 2006: 145-154
19		Sumeet Kumar, Aneesh Aggarwal: Reducing resource redundancy for concurrent error detection techniques in high performance microprocessors. HPCA 2006: 212-221
18		Joseph J. Sharkey, Nayef Abu-Ghazeleh, Dmitry V. Ponomarev, Kanad Ghose, Aneesh Aggarwal: Trade-Offs in Transient Fault Recovery Schemes for Redundant Multithreaded Processors. HiPC 2006: 135-147
17		Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Aneesh Aggarwal: Address-Value Decoupling for Early Register Deallocation. ICPP 2006: 337-346
16		Sumeet Kumar, Aneesh Aggarwal: Self-checking instructions: reducing instruction redundancy for concurrent error detection. PACT 2006: 64-73
	2005
15		Prateek Pujara, Aneesh Aggarwal: Restrictive Compression Techniques to Increase Level 1 Cache Capacity. ICCD 2005: 327-333
14		Aneesh Aggarwal: Reducing latencies of pipelined cache accesses through set prediction. ICS 2005: 2-11
13		Aneesh Aggarwal, Manoj Franklin: Instruction Replication for Reducing Delays Due to Inter-PE Communication Latency. IEEE Trans. Computers 54(12): 1496-1507 (2005)
12		Aneesh Aggarwal, Manoj Franklin: Scalability Aspects of Instruction Distribution Algorithms for Clustered Processors. IEEE Trans. Parallel Distrib. Syst. 16(10): 944-955 (2005)
	2004
11		Aneesh Aggarwal: Single FU Bypass Networks for High Clock Rate Superscalar Processors. HiPC 2004: 319-332
10		Aneesh Aggarwal, Manoj Franklin, Oguz Ergin: Defining Wakeup Width for Efficient Dynamic Scheduling. ICCD 2004: 36-41
9		Sumeet Kumar, Prateek Pujara, Aneesh Aggarwal: Bit-Sliced Datapath for Energy-Efficient High Performance Microprocessors. PACS 2004: 30-45
8		Abdel-Hameed A. Badawy, Aneesh Aggarwal, Donald Yeung, Chau-Wen Tseng: The Efficacy of Software Prefetching and Locality Optimizations on Future Memory Systems. J. Instruction-Level Parallelism 6: (2004)
	2003
7		Aneesh Aggarwal, Manoj Franklin: Energy Efficient Asymmetrically Ported Register Files. ICCD 2003: 2-7
6		Aneesh Aggarwal, Manoj Franklin: Instruction Replication: Reducing Delays Due to Inter-PE Communication Latency. IEEE PACT 2003: 46-55
	2002
5		Aneesh Aggarwal, Manoj Franklin: Hierarchical Interconnects for On-Chip Clustering. IPDPS 2002
4		Aneesh Aggarwal: Software caching vs. prefetching. MSP/ISMM 2002: 263-268
	2001
3		Aneesh Aggarwal, Manoj Franklin: Putting Data Value Predictors to Work in Fine-Grain Parallel Processors. HiPC 2001: 204-213
2		Abdel-Hameed A. Badawy, Aneesh Aggarwal, Donald Yeung, Chau-Wen Tseng: Evaluating the impact of memory system performance on software prefetching and locality optimizations. ICS 2001: 486-500
1		Aneesh Aggarwal, Keith H. Randall: Related Field Analysis. PLDI 2001: 214-220

Coauthor Index

1	Nayef Abu-Ghazeleh	[18]
2	Abdel-Hameed A. Badawy	[2] [8]
3	Deniz Balkan	[17]
4	Rajdeep Bhowmik	[21] [24]
5	Polina Dudnik	[30]
6	Oguz Ergin	[10]
7	Manoj Franklin	[3] [5] [6] [7] [10] [12] [13]
8	Kanad Ghose	[18]
9	Saugata Ghose	[30]
10	Latoya Gilgeous	[30]
11	Madhusudhan Govindaraju	[21] [24]
12	Chaitali Gupta	[21] [24]
13	Sumeet Kumar	[9] [16] [19] [26]
14	Dmitry V. Ponomarev (Dmitry Ponomarev)	[17] [18]
15	Prateek Pujara	[9] [15] [20] [22] [23]
16	Keith H. Randall	[1]
17	Joseph J. Sharkey	[17] [18]
18	Sandeep Sirsi	[28]
19	Tameesh Suri	[25] [29] [31]
20	Chau-Wen Tseng	[2] [8]
21	Corey Waxman	[30]
22	Donald Yeung	[2] [8]

Colors in the list of coauthors