Alexander Albicki Coauthor index DBLP Vis pubzone.org

List of publications from the DBLP Bibliography Server - FAQ
Ask others: ACM DL/Guide - CiteSeerX - CSB - MetaPress - Google - Bing - Yahoo

DBLP keys1996
13Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRazak Hossain, Menghui Zheng, Alexander Albicki: Reducing power dissipation in CMOS circuits by signal probability based transistor reordering. IEEE Trans. on CAD of Integrated Circuits and Systems 15(3): 361-368 (1996)
1995
12Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLYu Fang, Alexander Albicki: Efficient testability enhancement for combinational circuit. ICCD 1995: 168-179
11Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMenghui Zheng, Alexander Albicki: Low power and high speed multiplication design through mixed number representations. ICCD 1995: 566-576
1994
10no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRazak Hossain, Menghui Zheng, Alexander Albicki: Reducing Power Dissipation in Serially Connected MOSFET Circuits via Transistor Reordering. ICCD 1994: 614-617
9Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRazak Hossain, Leszek D. Wronski, Alexander Albicki: Low power design using double edge triggered flip-flops. IEEE Trans. VLSI Syst. 2(2): 261-265 (1994)
1993
8no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLXiaodong Xie, Alexander Albicki: Bit-Splitting for Testability Enhancement in Scan-Based Design. ICCD 1993: 155-158
7no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRazak Hossain, Leszek D. Wronski, Alexander Albicki: Double Edge Triggered Devices: Speed and Power Considerations. ISCAS 1993: 1491-1494
1992
6no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLXiaodong Xie, Alexander Albicki, Andrzej Krasniewski: Design of Robust-Path-Delay-Fault-Testable Combinational Circuits by Boolean Space Expansion. ICCD 1992: 482-485
1991
5no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAndrzej Krasniewski, Alexander Albicki: Random Testability of Redundant Circuits. ICCD 1991: 424-427
1989
4no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRobert F. Molyneaux, Alexander Albicki: Comments on "Ternary Scan Design for VLSI Testability". IEEE Trans. Computers 38(2): 256-263 (1989)
1985
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAndrzej Krasniewski, Alexander Albicki: Simulation-free estimation of speed degradation in NMOS self-testing circuits for CAD applications. DAC 1985: 808-811
2no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAndrzej Krasniewski, Alexander Albicki: Automatic Design of Exhaustively Self-Testing Chips with Bilbo Modules. ITC 1985: 362-371
1no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLCarl Staelin, Alexander Albicki: Evaluation ot Monitor Complexity for Concurrently Testing Microprogrammed Control Units. ITC 1985: 733-736

Coauthor Index

1Yu Fang [12]
2Razak Hossain [7] [9] [10] [13]
3Andrzej Krasniewski [2] [3] [5] [6]
4Robert F. Molyneaux [4]
5Carl Staelin [1]
6Leszek D. Wronski [7] [9]
7Xiaodong Xie [6] [8]
8Menghui Zheng [10] [11] [13]

Colors in the list of coauthors

Copyright © Thu Dec 3 22:36:56 2009 by Michael Ley (ley@uni-trier.de)