Gerd Ascheid

	2009
61		David Kammler, Diandian Zhang, Peter Schwabe, Hanno Scharwächter, Markus Langenberg, Dominik Auras, Gerd Ascheid, Rudolf Mathar: Designing an ASIP for Cryptographic Pairings over Barreto-Naehrig Curves. CHES 2009: 254-271
60		Jianjiang Ceng, Weihua Sheng, Jerónimo Castrillón, Anastasia Stulova, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: A high-level virtual platform for early MPSoC software development. CODES+ISSS 2009: 11-20
59		Lei Gao, Jia Huang, Jianjiang Ceng, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: TotalProf: a fast and accurate retargetable source code profiler. CODES+ISSS 2009: 305-314
58		Kingshuk Karuri, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: A Generic Design Flow for Application Specific Processor Customization through Instruction-Set Extensions (ISEs). SAMOS 2009: 204-214
57		Torsten Kempf, Stefan Wallentowitz, Gerd Ascheid, Rainer Leupers, Heinrich Meyr: A Workbench for Analytical and Simulation Based Design Space Exploration of Software Defined Radios. VLSI Design 2009: 281-286
56		Anupam Chattopadhyay, Harold Ishebabi, Xiaolin Chen, Z. Rakosi, Kingshuk Karuri, David Kammler, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Pre- and postfabrication architecture exploration for partially reconfigurable VLIW processors. ACM Trans. Embedded Comput. Syst. 8(2): (2009)
55		Konstantinos Nikitopoulos, Ernst Martin Witte, Dan Zhang, David Kammler, I-Wei Lai, Chun-Hao Liao, Filippo Borlenghi, Gerd Ascheid: Complexity-Efficient Enumeration Techniques for Soft-Input, Soft-Output Sphere Decoding CoRR abs/0906.3194: (2009)
54		Venkatesh Ramakrishnan, Ernst Martin Witte, Torsten Kempf, David Kammler, Gerd Ascheid, Heinrich Meyr, Marc Adrat, Markus Antweiler: Efficient And Portable SDR Waveform Development: The Nucleus Concept CoRR abs/0906.3313: (2009)
53		Ernst Martin Witte, Filippo Borlenghi, Gerd Ascheid, Rainer Leupers, Heinrich Meyr: A Scalable VLSI Architecture for Soft-Input Soft-Output Depth-First Sphere Decoding CoRR abs/0910.3427: (2009)
52		Manuel Hohenauer, Felix Engel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: A SIMD optimization framework for retargetable compilers. TACO 6(1): (2009)
	2008
51		Lei Gao, Kingshuk Karuri, Stefan Kraemer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Multiprocessor performance estimation using hybrid simulation. DAC 2008: 325-330
50		Jianjiang Ceng, Jerónimo Castrillón, Weihua Sheng, Hanno Scharwächter, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tsuyoshi Isshiki, Hiroaki Kunieda: MAPS: an integrated framework for MPSoC application parallelization. DAC 2008: 754-759
49		Anupam Chattopadhyay, Xiaolin Chen, Harold Ishebabi, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: High-level Modelling and Exploration of Coarse-grained Re-configurable Architectures. DATE 2008: 1334-1339
48		Manuel Hohenauer, Felix Engel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gerrit Bette, Balpreet Singh: Retargetable Code Optimization for Predicated Execution. DATE 2008: 1492-1497
47		Rainer Leupers, Gerd Ascheid, Wilfried Verachtert, Tom Ashby, Arnout Vandecappelle: System-Level Design and Application Mapping for Wireless and Multimedia MPSoC Architectures. DATE 2008
46		I-Wei Lai, Susanne Godtmann, Tzi-Dar Chiueh, Gerd Ascheid, Heinrich Meyr: Asymptotic BER Analysis for MIMO-BICM with Zero-Forcing Detectors Assuming Imperfect CSI. ICC 2008: 1238-1242
45		Niels Hadaschik, Gerd Ascheid: Deriving a Joint Interference Detection and Channel Estimation for WB-OFDM from EM-MAP Theory. ICC 2008: 1322-1327
44		Susanne Godtmann, Niels Hadaschik, Wolfgang Steinert, Gerd Ascheid: A Concept for Data-Aided Carrier Frequency Estimation at Low Signal-To-Noise Ratios. ICC 2008: 463-467
43		Susanne Godtmann, Helge Lüders, Gerd Ascheid, Peter Vary: A Bit-Mapping Strategy for Joint Iterative Channel Estimation and Turbo-Decoding. VTC Fall 2008: 1-5
42		Markus Jordan, Martin Senst, Gerd Ascheid, Heinrich Meyr: Long-Term Beamforming in Single Frequency Networks using Semidefinite Relaxation. VTC Spring 2008: 275-279
41		Anupam Chattopadhyay, Harold Ishebabi, Xiaolin Chen, Z. Rakosi, Kingshuk Karuri, David Kammler, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Prefabrication and postfabrication architecture exploration for partially reconfigurable VLIW processors. ACM Trans. Embedded Comput. Syst. 7(4): (2008)
40		Kingshuk Karuri, Anupam Chattopadhyay, Xiaolin Chen, David Kammler, Ling Hao, Rainer Leupers, Heinrich Meyr, Gerd Ascheid: A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors. IEEE Trans. VLSI Syst. 16(10): 1281-1294 (2008)
39		Diandian Zhang, Anupam Chattopadhyay, David Kammler, Ernst Martin Witte, Gerd Ascheid, Rainer Leupers, Heinrich Meyr: Power-efficient Instruction Encoding Optimization for Various Architecture Classes. JCP 3(3): 25-38 (2008)
	2007
38		Lei Gao, Stefan Kraemer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: A fast and generic hybrid simulation approach using C virtual machine. CASES 2007: 3-12
37		Hanno Scharwächter, Jonghee M. Yoon, Rainer Leupers, Yunheung Paek, Gerd Ascheid, Heinrich Meyr: A code-generator generator for multi-output instructions. CODES+ISSS 2007: 131-136
36		Stefan Kraemer, Lei Gao, Jan Weinstock, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: HySim: a fast simulation framework for embedded software development. CODES+ISSS 2007: 75-80
35		Stefan Kraemer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Interactive presentation: SoftSIMD - exploiting subword parallelism using source code transformations. DATE 2007: 1349-1354
34		Anupam Chattopadhyay, W. Ahmed, Kingshuk Karuri, David Kammler, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Design space exploration of partially re-configurable embedded processors. DATE 2007: 319-324
33		Martin Senst, Markus Jordan, Meik Dorpinghaus, Michael Farber, Gerd Ascheid, Heinrich Meyr: Joint Reduction of Peak-to-Average Power Ratio and Out-of-Band Power in OFDM Systems. GLOBECOM 2007: 3812-3816
32		Kingshuk Karuri, Anupam Chattopadhyay, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Increasing data-bandwidth to instruction-set extensions through register clustering. ICCAD 2007: 166-171
31		Anupam Chattopadhyay, Z. Rakosi, Kingshuk Karuri, David Kammler, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Pre- and Post-Fabrication Architecture Exploration for Partially Reconfigurable VLIW Processors. IEEE International Workshop on Rapid System Prototyping 2007: 189-194
30		Markus Jordan, Gerd Ascheid, Heinrich Meyr: Performance Evaluation of Opportunistic Beamforming with SINR Prediction for HSDPA. VTC Spring 2007: 1652-1656
29		Susanne Godtmann, André Pollok, Niels Hadaschik, Gerd Ascheid, Heinrich Meyr: On the Influence of Pilot Symbol and Data Symbol Positioning on Turbo Synchronization. VTC Spring 2007: 1723-1726
28		Hanno Scharwächter, David Kammler, Andreas Wieferink, Manuel Hohenauer, Kingshuk Karuri, Jianjiang Ceng, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: ASIP architecture exploration for efficient IPSec encryption: A case study. ACM Trans. Embedded Comput. Syst. 6(2): (2007)
	2006
27		Manuel Hohenauer, Christoph Schumacher, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Hans van Someren: Retargetable code optimization with SIMD instructions. CODES+ISSS 2006: 148-153
26		Torsten Kempf, Kingshuk Karuri, Stefan Wallentowitz, Gerd Ascheid, Rainer Leupers, Heinrich Meyr: A SW performance estimation framework for early system-level-design using fine-grained instrumentation. DATE 2006: 468-473
25		Anupam Chattopadhyay, B. Geukes, David Kammler, Ernst Martin Witte, Oliver Schliebusch, Harold Ishebabi, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Automatic ADL-based operand isolation for embedded processors. DATE 2006: 600-605
24		Hanno Scharwächter, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: An interprocedural code optimization technique for network processors using hardware multi-threading support. DATE 2006: 919-924
23		Kingshuk Karuri, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Monu Kedia: Design and implementation of a modular and portable IEEE 754 compliant floating-point unit. DATE Designers' Forum 2006: 221-226
22		Luca Fanucci, Michele Cassiano, Sergio Saponara, David Kammler, Ernst Martin Witte, Oliver Schliebusch, Gerd Ascheid, Rainer Leupers, Heinrich Meyr: ASIP design and synthesis for non linear filtering in image processing. DATE Designers' Forum 2006: 233-238
21		Kingshuk Karuri, Christian Huben, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Memory Access Micro-Profiling for ASIP Design. DELTA 2006: 255-262
20		Anupam Chattopadhyay, Arnab Sinha, Diandian Zhang, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Integrated Verification Approach during ADL-Driven Processor Design. IEEE International Workshop on Rapid System Prototyping 2006: 110-118
19		Harold Ishebabi, Gerd Ascheid, Heinrich Meyr, O. Atak, A. Atalar, E. Arikan: An efficient parallelization technique for high throughput FFT-ASIPs. ISCAS 2006
18		Jianjiang Ceng, Weihua Sheng, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun: Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting. VLSI Signal Processing 43(2-3): 235-246 (2006)
	2005
17		Mohammad Mostafizur Rahman Mozumdar, Kingshuk Karuri, Anupam Chattopadhyay, Stefan Kraemer, Hanno Scharwächter, Heinrich Meyr, Gerd Ascheid, Rainer Leupers: Instruction Set Customization of Application Specific Processors for Network Processing: A Case Study. ASAP 2005: 154-160
16		Oliver Schliebusch, Anupam Chattopadhyay, David Kammler, Gerd Ascheid, Rainer Leupers, Heinrich Meyr, Tim Kogel: A framework for automated and optimized ASIP implementation supporting multiple hardware description languages. ASP-DAC 2005: 280-285
15		Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tom Michiels, Achim Nohl, Tim Kogel: Retargetable generation of TLM bus interfaces for MP-SoC platforms. CODES+ISSS 2005: 249-254
14		Kingshuk Karuri, Mohammad Abdullah Al Faruque, Stefan Kraemer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Fine-grained application source code profiling for ASIP design. DAC 2005: 329-334
13		Jianjiang Ceng, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun: C Compiler Retargeting Based on Instruction Semantics Models. DATE 2005: 1150-1155
12		Torsten Kempf, Malte Doerper, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tim Kogel, Bart Vanthournout: A Modular Simulation Framework for Spatial and Temporal Task Mapping onto Multi-Processor SoC Platforms. DATE 2005: 876-881
11		Oliver Schliebusch, Anupam Chattopadhyay, Ernst Martin Witte, David Kammler, Gerd Ascheid, Rainer Leupers, Heinrich Meyr: Optimization Techniques for ADL-Driven RTL Processor Synthesis. IEEE International Workshop on Rapid System Prototyping 2005: 165-171
10		Rainer Leupers, Gerd Ascheid: Digital Signal Processors. Handbook of Networked and Embedded Control Systems 2005: 279-294
	2004
9		Andreas Wieferink, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun, Achim Nohl: A System Level Processor/Communication Co-Exploration Methodology for Multi-Processor System-on-Chip Platform. DATE 2004: 1256-1263
8		Manuel Hohenauer, Hanno Scharwächter, Kingshuk Karuri, Oliver Wahlen, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun, Hans van Someren: A Methodology and Tool Suite for C Compiler Generation from ADL Processor Models. DATE 2004: 1276-1283
7		Oliver Schliebusch, Anupam Chattopadhyay, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Mario Steinert, Gunnar Braun, Achim Nohl: RTL Processor Synthesis for Architecture Exploration and Implementation. DATE 2004: 156-160
6		Tim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Virtual Architecture Mapping: A SystemC Based Methodology for Architectural Exploration of System-on-Chip Designs. SAMOS 2004: 138-148
5		Andreas Wieferink, Malte Doerper, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Early ISS Integration into Network-on-Chip Designs. SAMOS 2004: 443-452
4		Jianjiang Ceng, Weihua Sheng, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun: Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting. SAMOS 2004: 463-473
3		Hanno Scharwächter, David Kammler, Andreas Wieferink, Manuel Hohenauer, Kingshuk Karuri, Jianjiang Ceng, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: ASIP Architecture Exploration for Efficient Ipsec Encryption: A Case Study. SCOPES 2004: 33-46
	2003
2		Tim Kogel, Malte Doerper, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Serge Goossens: A modular simulation framework for architectural exploration of on-chip interconnection networks. CODES+ISSS 2003: 7-12
1		Oliver Wahlen, Manuel Hohenauer, Gunnar Braun, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Xiaoning Nie: Extraction of Efficient Instruction Schedulers from Cycle-True Processor Models. SCOPES 2003: 167-181

Coauthor Index

1	Marc Adrat	[54]
2	W. Ahmed	[34]
3	Markus Antweiler	[54]
4	E. Arikan	[19]
5	Tom Ashby	[47]
6	O. Atak	[19]
7	A. Atalar	[19]
8	Dominik Auras	[61]
9	Gerrit Bette	[48]
10	Filippo Borlenghi	[53] [55]
11	Gunnar Braun	[1] [4] [7] [8] [9] [13] [18]
12	Michele Cassiano	[22]
13	Jerónimo Castrillón	[50] [60]
14	Jianjiang Ceng	[3] [4] [13] [18] [28] [50] [59] [60]
15	Anupam Chattopadhyay	[7] [11] [16] [17] [20] [25] [31] [32] [34] [39] [40] [41] [49] [56]
16	Xiaolin Chen	[40] [41] [49] [56]
17	Tzi-Dar Chiueh	[46]
18	Malte Doerper	[2] [5] [6] [12]
19	Meik Dorpinghaus	[33]
20	Felix Engel	[48] [52]
21	Luca Fanucci	[22]
22	Michael Farber	[33]
23	Mohammad Abdullah Al Faruque	[14]
24	Lei Gao	[36] [38] [51] [59]
25	B. Geukes	[25]
26	Susanne Godtmann	[29] [43] [44] [46]
27	Serge Goossens	[2]
28	Niels Hadaschik	[29] [44] [45]
29	Ling Hao	[40]
30	Manuel Hohenauer	[1] [3] [4] [8] [13] [18] [24] [27] [28] [32] [48] [52]
31	Jia Huang	[59]
32	Christian Huben	[21]
33	Harold Ishebabi	[19] [25] [41] [49] [56]
34	Tsuyoshi Isshiki	[50]
35	Markus Jordan	[30] [33] [42]
36	David Kammler	[3] [11] [16] [22] [25] [28] [31] [34] [39] [40] [41] [54] [55] [56] [61]
37	Kingshuk Karuri	[3] [8] [14] [17] [21] [23] [26] [28] [31] [32] [34] [40] [41] [51] [56] [58]
38	Monu Kedia	[23]
39	Torsten Kempf	[6] [12] [26] [54] [57]
40	Tim Kogel	[2] [5] [6] [8] [9] [12] [15] [16]
41	Stefan Kraemer	[14] [17] [35] [36] [38] [51]
42	Hiroaki Kunieda	[50]
43	I-Wei Lai	[46] [55]
44	Markus Langenberg	[61]
45	Rainer Leupers	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [20] [21] [22] [23] [24] [25] [26] [27] [28] [31] [32] [34] [35] [36] [37] [38] [39] [40] [41] [47] [48] [49] [50] [51] [52] [53] [56] [57] [58] [59] [60]
46	Chun-Hao Liao	[55]
47	Helge Lüders	[43]
48	Rudolf Mathar	[61]
49	Heinrich Meyr	[1] [2] [3] [4] [5] [6] [7] [8] [9] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28] [29] [30] [31] [32] [33] [34] [35] [36] [37] [38] [39] [40] [41] [42] [46] [48] [49] [50] [51] [52] [53] [54] [56] [57] [58] [59] [60]
50	Tom Michiels	[15]
51	Mohammad Mostafizur Rahman Mozumdar	[17]
52	Xiaoning Nie	[1]
53	Konstantinos Nikitopoulos	[55]
54	Achim Nohl	[7] [9] [15]
55	Yunheung Paek	[37]
56	André Pollok	[29]
57	Z. Rakosi	[31] [41] [56]
58	Venkatesh Ramakrishnan	[54]
59	Sergio Saponara	[22]
60	Hanno Scharwächter	[3] [8] [17] [24] [28] [37] [50] [61]
61	Oliver Schliebusch	[7] [11] [16] [22] [25]
62	Christoph Schumacher	[27]
63	Peter Schwabe	[61]
64	Martin Senst	[33] [42]
65	Weihua Sheng	[4] [18] [50] [60]
66	Balpreet Singh	[48]
67	Arnab Sinha	[20]
68	Hans van Someren	[8] [27]
69	Mario Steinert	[7]
70	Wolfgang Steinert	[44]
71	Anastasia Stulova	[60]
72	Arnout Vandecappelle	[47]
73	Bart Vanthournout	[12]
74	Peter Vary	[43]
75	Wilfried Verachtert	[47]
76	Oliver Wahlen	[1] [8]
77	Stefan Wallentowitz	[26] [57]
78	Jan Weinstock	[36]
79	Andreas Wieferink	[2] [3] [5] [6] [9] [15] [28]
80	Ernst Martin Witte	[11] [22] [25] [39] [53] [54] [55]
81	Jonghee M. Yoon	[37]
82	Dan Zhang	[55]
83	Diandian Zhang	[20] [39] [61]