Todd M. Austin

	2008
71		Andrea Pellegrini, Kypros Constantinides, Dan Zhang, Shobana Sudhakar, Valeria Bertacco, Todd M. Austin: CrashTest: A fast high-fidelity FPGA-based resiliency analysis framework. ICCD 2008: 363-370
70		Martha Mercaldi Kim, John D. Davis, Mark Oskin, Todd M. Austin: Polymorphic On-Chip Networks. ISCA 2008: 101-112
69		Todd M. Austin: On the rules of low-power design (and how to break them). ISLPED 2008: 381-382
68		Joseph L. Greathouse, Ilya Wagner, David A. Ramos, Gautam Bhatnagar, Todd M. Austin, Valeria Bertacco, Seth Pettie: Testudo: Heavyweight security analysis via statistical sampling. MICRO 2008: 117-128
67		Kypros Constantinides, Onur Mutlu, Todd M. Austin: Online design bug detection: RTL analysis, flexible mechanisms, and evaluation. MICRO 2008: 282-293
66		Todd M. Austin, Valeria Bertacco, Scott A. Mahlke, Yu Cao: Reliable Systems on Unreliable Fabrics. IEEE Design & Test of Computers 25(4): 322-332 (2008)
65		Ilya Wagner, Valeria Bertacco, Todd M. Austin: Using Field-Repairable Control Logic to Correct Design Errors in Microprocessors. IEEE Trans. on CAD of Integrated Circuits and Systems 27(2): 380-393 (2008)
64		Mojtaba Mehrara, Todd M. Austin: Exploiting selective placement for low-cost memory protection. TACO 5(3): (2008)
	2007
63		Mojtaba Mehrara, Mona Attariyan, Smitha Shyam, Kypros Constantinides, Valeria Bertacco, Todd M. Austin: Low-cost protection for SER upsets and silicon defects. DATE 2007: 1146-1151
62		Martha Mercaldi Kim, Mojtaba Mehrara, Mark Oskin, Todd M. Austin: Architectural implications of brick and mortar silicon manufacturing. ISCA 2007: 244-253
61		Kypros Constantinides, Onur Mutlu, Todd M. Austin, Valeria Bertacco: Software-Based Online Detection of Hardware Defects Mechanisms, Architectural Support, and Evaluation. MICRO 2007: 97-108
60		Himanshu Kaul, Dennis Sylvester, David Blaauw, Trevor N. Mudge, Todd M. Austin: DVS for On-Chip Bus Designs Based on Timing Error Correction CoRR abs/0710.4679: (2007)
59		Ilya Wagner, Valeria Bertacco, Todd M. Austin: Microprocessor Verification via Feedback-Adjusted Markov Models. IEEE Trans. on CAD of Integrated Circuits and Systems 26(6): 1126-1138 (2007)
58		Kypros Constantinides, Stephen Plaza, Jason A. Blome, Valeria Bertacco, Scott A. Mahlke, Todd M. Austin, Bin Zhang, Michael Orshansky: Architecting a reliable CMP switch architecture. TACO 4(1): (2007)
	2006
57		Ilya Wagner, Valeria Bertacco, Todd M. Austin: Depth-driven verification of simultaneous interfaces. ASP-DAC 2006: 442-447
56		Smitha Shyam, Kypros Constantinides, Sujay Phadke, Valeria Bertacco, Todd M. Austin: Ultra low-cost defect protection for microprocessor pipelines. ASPLOS 2006: 73-82
55		Ilya Wagner, Valeria Bertacco, Todd M. Austin: Shielding against design flaws with field repairable control logic. DAC 2006: 344-347
54		Kypros Constantinides, Stephen Plaza, Jason A. Blome, Bin Zhang, Valeria Bertacco, Scott A. Mahlke, Todd M. Austin, Michael Orshansky: BulletProof: a defect-tolerant CMP switch architecture. HPCA 2006: 5-16
53		Mojtaba Mehrara, Todd M. Austin: Reliability-aware data placement for partial memory protection in embedded processors. Memory System Performance and Correctness 2006: 11-18
52		Todd M. Austin: Razor: a low-power pipeline based on circuit-level timing speculation. SBCCI 2006: 13
51		Todd M. Austin: Robust low power computing in the nanoscale era. SBCCI 2006: 6
	2005
50		Todd M. Austin, Valeria Bertacco, David Blaauw, Trevor N. Mudge: Opportunities and challenges for better than worst-case design. ASP-DAC 2005: 2-7
49		Leyla Nazhandali, Michael Minuth, Bo Zhai, Javin Olson, Todd M. Austin, David Blaauw: A second-generation sensor network processor with application-driven memory optimizations and out-of-order execution. CASES 2005: 249-256
48		Ilya Wagner, Valeria Bertacco, Todd M. Austin: StressTest: an automatic approach to test generation via activity monitors. DAC 2005: 783-788
47		Himanshu Kaul, Dennis Sylvester, David Blaauw, Trevor N. Mudge, Todd M. Austin: DVS for On-Chip Bus Designs Based on Timing Error Correction. DATE 2005: 80-85
46		Todd M. Austin, Valeria Bertacco: Deployment of Better Than Worst-Case Design: Solutions and Needs. ICCD 2005: 550-558
45		Leyla Nazhandali, Bo Zhai, Javin Olson, Anna Reeves, Michael Minuth, Ryan Helfand, Sanjay Pant, Todd M. Austin, David Blaauw: Energy Optimization of Subthreshold-Voltage Sensor Network Processors. ISCA 2005: 197-207
44		David Roberts, Todd M. Austin, David Blaauw, Trevor N. Mudge, Krisztián Flautner: Error Analysis for the Support of Robust Voltage Scaling. ISQED 2005: 65-70
	2004
43		Rajeev Krishna, Scott A. Mahlke, Todd M. Austin: Memory system design space exploration for low-power, real-time speech recognition. CODES+ISSS 2004: 140-145
42		Seokwoo Lee, Shidhartha Das, Valeria Bertacco, Todd M. Austin, David Blaauw, Trevor N. Mudge: Circuit-aware architectural simulation. DAC 2004: 305-310
41		Todd M. Austin: Designing robust microarchitectures. DAC 2004: 78
40		Nam Sung Kim, Taeho Kgil, Valeria Bertacco, Todd M. Austin, Trevor N. Mudge: Microarchitectural power modeling techniques for deep sub-micron microprocessors. ISLPED 2004: 212-217
39		Seokwoo Lee, Shidhartha Das, Toan Pham, Todd M. Austin, David Blaauw, Trevor N. Mudge: Reducing pipeline energy demands with local DVS and dynamic retiming. ISLPED 2004: 319-324
38		Todd M. Austin, David Blaauw, Trevor N. Mudge, Krisztián Flautner: Making Typical Silicon Matter with Razor. IEEE Computer 37(3): 57-65 (2004)
37		Todd M. Austin, David Blaauw, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Wayne Wolf: Mobile Supercomputers. IEEE Computer 37(5): 81-83 (2004)
36		Dan Ernst, Shidhartha Das, Seokwoo Lee, David Blaauw, Todd M. Austin, Trevor N. Mudge, Nam Sung Kim, Krisztián Flautner: Razor: Circuit-Level Correction of Timing Errors for Low-Power Operation. IEEE Micro 24(6): 10-20 (2004)
35		Doug Burger, Todd M. Austin, Stephen W. Keckler: Recent extensions to the SimpleScalar tool suite. SIGMETRICS Performance Evaluation Review 31(4): 4-7 (2004)
	2003
34		Rajeev Krishna, Scott A. Mahlke, Todd M. Austin: Architectural optimizations for low-power, real-time speech recognition. CASES 2003: 220-231
33		Dan Ernst, Andrew Hamel, Todd M. Austin: Cyclone: A Broadcast-Free Dynamic Instruction Scheduler with Selective Replay. ISCA 2003: 253-262
32		Shubhendu S. Mukherjee, Christopher T. Weaver, Joel S. Emer, Steven K. Reinhardt, Todd M. Austin: A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor. MICRO 2003: 29-42
31		Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pant, Rajeev R. Rao, Toan Pham, Conrad H. Ziesler, David Blaauw, Todd M. Austin, Krisztián Flautner, Trevor N. Mudge: Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation. MICRO 2003: 7-18
30		Nam Sung Kim, Todd M. Austin, David Blaauw, Trevor N. Mudge, Krisztián Flautner, Jie S. Hu, Mary Jane Irwin, Mahmut T. Kandemir, Narayanan Vijaykrishnan: Leakage Current: Moore's Law Meets Static Power. IEEE Computer 36(12): 68-75 (2003)
29		Shubhendu S. Mukherjee, Christopher T. Weaver, Joel S. Emer, Steven K. Reinhardt, Todd M. Austin: Measuring Architectural Vulnerability Factors. IEEE Micro 23(6): 70-75 (2003)
	2002
28		Dan Ernst, Todd M. Austin: Efficient Dynamic Scheduling Through Tag Elimination. ISCA 2002: 37-46
27		Glenn Reinman, Brad Calder, Todd M. Austin: High Performance and Energy Efficient Serial Prefetch Architecture. ISHPC 2002: 146-159
26		Shubhendu S. Mukherjee, Sarita V. Adve, Todd M. Austin, Joel S. Emer, Peter S. Magnusson: Performance Simulation Tools. IEEE Computer 35(2): 38-39 (2002)
25		Todd M. Austin, Eric Larson, Dan Ernst: SimpleScalar: An Infrastructure for Computer System Modeling. IEEE Computer 35(2): 59-67 (2002)
	2001
24		Christopher T. Weaver, Rajeev Krishna, Lisa Wu, Todd M. Austin: Application specific architectures: a recipe for fast, flexible and power efficient designs. CASES 2001: 181-185
23		Maher N. Mneimneh, Fadi A. Aloul, Christopher T. Weaver, Saugata Chatterjee, Karem A. Sakallah, Todd M. Austin: Scalable Hybrid Verification of Complex Microprocessors. DAC 2001: 41-46
22		Christopher T. Weaver, Todd M. Austin: A Fault Tolerant Approach to Microprocessor Design. DSN 2001: 411-420
21		Lisa Wu, Christopher T. Weaver, Todd M. Austin: CryptoManiac: a fast flexible architecture for secure communication. ISCA 2001: 110-119
20		Todd M. Austin: Design for Verification? IEEE Design & Test of Computers 18(4): 80, 77 (2001)
19		Glenn Reinman, Brad Calder, Todd M. Austin: Optimizations Enabled by a Decoupled Front-End Architecture. IEEE Trans. Computers 50(4): 338-355 (2001)
	2000
18		Jerome Burke, John McDonald, Todd M. Austin: Architectural Support for Fast Symmetric-Key Cryptography. ASPLOS 2000: 178-189
17		Eric Larson, Todd M. Austin: Compiler controlled value prediction using branch predictor based confidence. MICRO 2000: 327-336
16		Saugata Chatterjee, Christopher T. Weaver, Todd M. Austin: Efficient checker processor design. MICRO 2000: 87-97
15		Todd M. Austin: DIVA: A Dynamic Approach to Microprocessor Verification. J. Instruction-Level Parallelism 2: (2000)
	1999
14		Glenn Reinman, Todd M. Austin, Brad Calder: A Scalable Front-End Architecture for Fast Instruction Delivery. ISCA 1999: 234-245
13		Glenn Reinman, Brad Calder, Dean M. Tullsen, Gary S. Tyson, Todd M. Austin: Classifying load and store instructions for memory renaming. International Conference on Supercomputing 1999: 399-407
12		Glenn Reinman, Brad Calder, Todd M. Austin: Fetch Directed Instruction Prefetching. MICRO 1999: 16-27
11		Todd M. Austin: DIVA: A Reliable Substrate for Deep Submicron Microarchitecture Design. MICRO 1999: 196-207
10		Gary S. Tyson, Todd M. Austin: Memory Renaming: Fast, Early and Accurate Processing of Memory Communication. International Journal of Parallel Programming 27(5): 357-380 (1999)
	1998
9		Brad Calder, Chandra Krintz, Simmi John, Todd M. Austin: Cache-Conscious Data Placement. ASPLOS 1998: 139-149
8		Artur Klauser, Todd M. Austin, Dirk Grunwald, Brad Calder: Dynamic Hammock Predication for Non-Predicated Instruction Set Architectures. IEEE PACT 1998: 278-285
	1997
7		Gary S. Tyson, Todd M. Austin: Improving the Accuracy and Performance of Memory Communication Through Renaming. MICRO 1997: 218-227
6		Jude A. Rivers, Gary S. Tyson, Edward S. Davidson, Todd M. Austin: On High-Bandwidth Data Cache Design for Multi-Issue Processors. MICRO 1997: 46-56
	1996
5		Todd M. Austin, Gurindar S. Sohi: High-Bandwidth Address Translation for Multiple-Issue Processors. ISCA 1996: 158-167
	1995
4		Todd M. Austin, Dionisios N. Pnevmatikatos, Gurindar S. Sohi: Streamlining Data Cache Access with Fast Address Calculation. ISCA 1995: 369-380
3		Todd M. Austin, Gurindar S. Sohi: Zero-cycle loads: microarchitecture support for reducing load latency. MICRO 1995: 82-92
	1994
2		Todd M. Austin, Scott E. Breach, Gurindar S. Sohi: Efficient Detection of All Pointer and Array Access Errors. PLDI 1994: 290-301
	1992
1		Todd M. Austin, Gurindar S. Sohi: Dynamic Dependency Analysis of Ordinary Programs. ISCA 1992: 342-351

Coauthor Index

1	Sarita V. Adve	[26]
2	Fadi A. Aloul	[23]
3	Mona Attariyan	[63]
4	Valeria Bertacco	[40] [42] [46] [48] [50] [54] [55] [56] [57] [58] [59] [61] [63] [65] [66] [68] [71]
5	Gautam Bhatnagar	[68]
6	David Blaauw (David T. Blaauw)	[30] [31] [36] [37] [38] [39] [42] [44] [45] [47] [49] [50] [60]
7	Jason A. Blome	[54] [58]
8	Scott E. Breach	[2]
9	Doug Burger	[35]
10	Jerome Burke	[18]
11	Brad Calder	[8] [9] [12] [13] [14] [19] [27]
12	Yu Cao	[66]
13	Chaitali Chakrabarti	[37]
14	Saugata Chatterjee	[16] [23]
15	Kypros Constantinides	[54] [56] [58] [61] [63] [67] [71]
16	Shidhartha Das	[31] [36] [39] [42]
17	Edward S. Davidson	[6]
18	John D. Davis	[70]
19	Joel S. Emer	[26] [29] [32]
20	Dan Ernst	[25] [28] [31] [33] [36]
21	Krisztián Flautner	[30] [31] [36] [38] [44]
22	Joseph L. Greathouse	[68]
23	Dirk Grunwald	[8]
24	Andrew Hamel	[33]
25	Ryan Helfand	[45]
26	Jie S. Hu	[30]
27	Mary Jane Irwin	[30]
28	Simmi John	[9]
29	Mahmut T. Kandemir	[30]
30	Himanshu Kaul	[47] [60]
31	Stephen W. Keckler	[35]
32	Taeho Kgil	[40]
33	Martha Mercaldi Kim (Martha Mercaldi)	[62] [70]
34	Nam Sung Kim	[30] [31] [36] [40]
35	Artur Klauser	[8]
36	Chandra Krintz	[9]
37	Rajeev Krishna	[24] [34] [43]
38	Eric Larson	[17] [25]
39	Seokwoo Lee	[36] [39] [42]
40	Peter S. Magnusson	[26]
41	Scott A. Mahlke	[34] [37] [43] [54] [58] [66]
42	John McDonald	[18]
43	Mojtaba Mehrara	[53] [62] [63] [64]
44	Michael Minuth	[45] [49]
45	Maher N. Mneimneh	[23]
46	Trevor N. Mudge	[30] [31] [36] [37] [38] [39] [40] [42] [44] [47] [50] [60]
47	Shubhendu S. Mukherjee	[26] [29] [32]
48	Onur Mutlu	[61] [67]
49	Leyla Nazhandali	[45] [49]
50	Javin Olson	[45] [49]
51	Michael Orshansky	[54] [58]
52	Mark Oskin	[62] [70]
53	Sanjay Pant	[31] [45]
54	Andrea Pellegrini	[71]
55	Seth Pettie	[68]
56	Sujay Phadke	[56]
57	Toan Pham	[31] [39]
58	Stephen Plaza	[54] [58]
59	Dionisios N. Pnevmatikatos	[4]
60	David A. Ramos	[68]
61	Rajeev R. Rao	[31]
62	Anna Reeves	[45]
63	Steven K. Reinhardt	[29] [32]
64	Glenn Reinman	[12] [13] [14] [19] [27]
65	Jude A. Rivers	[6]
66	David Roberts	[44]
67	Karem A. Sakallah	[23]
68	Smitha Shyam	[56] [63]
69	Gurindar S. Sohi	[1] [2] [3] [4] [5]
70	Shobana Sudhakar	[71]
71	Dennis Sylvester	[47] [60]
72	Dean M. Tullsen	[13]
73	Gary S. Tyson	[6] [7] [10] [13]
74	Narayanan Vijaykrishnan (Vijaykrishnan Narayanan)	[30]
75	Ilya Wagner	[48] [55] [57] [59] [65] [68]
76	Christopher T. Weaver	[16] [21] [22] [23] [24] [29] [32]
77	Wayne Wolf	[37]
78	Lisa Wu	[21] [24]
79	Bo Zhai	[45] [49]
80	Bin Zhang	[54] [58]
81	Dan Zhang	[71]
82	Conrad H. Ziesler	[31]

Colors in the list of coauthors