 | 2008 |
|---|
| 10 |       | Deniz Balkan,
Joseph J. Sharkey,
Dmitry V. Ponomarev,
Kanad Ghose:
Predicting and Exploiting Transient Values for Reducing Register File Pressure and Energy Consumption.
IEEE Trans. Computers 57(1): 82-95 (2008) |
| 9 | | Deniz Balkan,
Joseph J. Sharkey,
Dmitry Ponomarev,
Kanad Ghose:
Selective Writeback: Reducing Register File Pressure and Energy Consumption.
IEEE Trans. VLSI Syst. 16(6): 650-661 (2008) |
| 2006 |
|---|
| 8 | | Deniz Balkan,
Joseph J. Sharkey,
Dmitry Ponomarev,
Aneesh Aggarwal:
Address-Value Decoupling for Early Register Deallocation.
ICPP 2006: 337-346 |
| 7 | | Deniz Balkan,
Joseph J. Sharkey,
Dmitry Ponomarev,
Kanad Ghose:
Selective writeback: exploiting transient values for energy-efficiency and performance.
ISLPED 2006: 37-42 |
| 6 | | Joseph J. Sharkey,
Deniz Balkan,
Dmitry Ponomarev:
Adaptive reorder buffers for SMT processors.
PACT 2006: 244-253 |
| 5 | | Deniz Balkan,
Joseph J. Sharkey,
Dmitry Ponomarev,
Kanad Ghose:
SPARTAN: speculative avoidance of register allocations to transient values for performance and energy efficiency.
PACT 2006: 265-274 |
| 4 | | Oguz Ergin,
Deniz Balkan,
Dmitry Ponomarev,
Kanad Ghose:
Early Register Deallocation Mechanisms Using Checkpointed Register Files.
IEEE Trans. Computers 55(9): 1153-1166 (2006) |
| 2004 |
|---|
| 3 | | Oguz Ergin,
Deniz Balkan,
Dmitry V. Ponomarev,
Kanad Ghose:
Increasing Processor Performance Through Early Register Release.
ICCD 2004: 480-487 |
| 2 | | Oguz Ergin,
Deniz Balkan,
Kanad Ghose,
Dmitry V. Ponomarev:
Register Packing: Exploiting Narrow-Width Operands for Reducing Register File Pressure.
MICRO 2004: 304-315 |
| 1 | | Deniz Balkan,
John Kalamatianos,
David R. Kaeli:
A Study of Errant Pipeline Flushes Caused by Value Misspeculation.
SBAC-PAD 2004: 32-39 |
