Wendy Belluomini Coauthor index DBLP Vis pubzone.org

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DBLP keys2008
11Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJames L. Hafner, Veera Deenadhayalan, Wendy Belluomini, Krishnakumar Rao: Undetected disk errors in RAID arrays. IBM Journal of Research and Development 52(4-5): 413-426 (2008)
10Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMohammad Banikazemi, Jim Hafner, Wendy Belluomini, K. K. Rao, Dan E. Poff, Bülent Abali: Flipstone: managing storage with fail-in-place and deferred maintenance service models. Operating Systems Review 42(1): 54-62 (2008)
2006
9Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLWendy Belluomini, Damir Jamsek, Andrew K. Martin, Chandler McDowell, Robert K. Montoye, Hung C. Ngo, Jun Sawada: Limited switch dynamic logic circuits for high-speed low-power circuit design. IBM Journal of Research and Development 50(2-3): 277-286 (2006)
2004
8no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRamyanshu Datta, Jacob A. Abraham, Robert K. Montoye, Wendy Belluomini, Hung C. Ngo, Chandler McDowell, Jente B. Kuang, Kevin J. Nowka: A low latency and low power dynamic Carry Save Adder. ISCAS (2) 2004: 477-480
2001
7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLChris J. Myers, Wendy Belluomini, Kip Kallpack, Eric Peskin, Hao Zheng: Timed circuits: a new paradigm for high-speed design. ASP-DAC 2001: 335-340
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLWendy Belluomini, Chris J. Myers, H. Peter Hofstee: Timed circuit verification using TEL structures. IEEE Trans. on CAD of Integrated Circuits and Systems 20(1): 129-146 (2001)
2000
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLWendy Belluomini, Chris J. Myers: Timed state space exploration using POSETs. IEEE Trans. on CAD of Integrated Circuits and Systems 19(5): 501-520 (2000)
1999
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLWendy Belluomini, Chris J. Myers, H. Peter Hofstee: Verification of Delayed-Reset Domino Circuits Using ATACS. ASYNC 1999: 3-12
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRobert Thacker, Wendy Belluomini, Chris J. Myers: Timed Circuit Synthesis Using Implicit Methods. VLSI Design 1999: 181-188
1998
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLWendy Belluomini, Chris J. Myers: Verification of Timed Systems Using POSETs. CAV 1998: 403-415
1997
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLWendy Belluomini, Chris J. Myers: Efficient Timing Analysis Algorithms for Timed State Space Exploration. ASYNC 1997: 88-100

Coauthor Index

1Bülent Abali [10]
2Jacob A. Abraham [8]
3Mohammad Banikazemi [10]
4Ramyanshu Datta [8]
5Veera Deenadhayalan [11]
6James Lee Hafner (James L. Hafner) [11]
7Jim Hafner [10]
8H. Peter Hofstee [4] [6]
9Damir Jamsek [9]
10Kip Kallpack [7]
11Jente B. Kuang [8]
12Andrew K. Martin [9]
13Chandler McDowell [8] [9]
14Robert K. Montoye [8] [9]
15Chris J. Myers [1] [2] [3] [4] [5] [6] [7]
16Hung C. Ngo [8] [9]
17Kevin J. Nowka [8]
18Eric Peskin [7]
19Dan E. Poff [10]
20K. K. Rao [10]
21Krishnakumar Rao [11]
22Jun Sawada [9]
23Robert Thacker [3]
24Hao Zheng [7]

Colors in the list of coauthors

Copyright © Sat Nov 14 20:26:04 2009 by Michael Ley (ley@uni-trier.de)