 | 2008 |
|---|
| 10 |       | Sudeep Pasricha,
Nikil Dutt,
Mohamed Ben-Romdhane:
Fast exploration of bus-based communication architectures at the CCATB abstraction.
ACM Trans. Embedded Comput. Syst. 7(2): (2008) |
| 2007 |
|---|
| 9 | | Sudeep Pasricha,
Nikil D. Dutt,
Mohamed Ben-Romdhane:
BMSYN: Bus Matrix Communication Architecture Synthesis for MPSoC.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(8): 1454-1464 (2007) |
| 2006 |
|---|
| 8 | | Sudeep Pasricha,
Nikil D. Dutt,
Mohamed Ben-Romdhane:
Constraint-driven bus matrix synthesis for MPSoC.
ASP-DAC 2006: 30-35 |
| 7 | | Sudeep Pasricha,
Nikil D. Dutt,
Elaheh Bozorgzadeh,
Mohamed Ben-Romdhane:
FABSYN: floorplan-aware bus architecture synthesis.
IEEE Trans. VLSI Syst. 14(3): 241-253 (2006) |
| 2005 |
|---|
| 6 | | Sudeep Pasricha,
Mohamed Ben-Romdhane:
Using TLM for Exploring Bus-based SoC Communication Architectures.
ASAP 2005: 79-85 |
| 5 | | Sudeep Pasricha,
Nikil Dutt,
Mohamed Ben-Romdhane:
Automated throughput-driven synthesis of bus-based communication architectures.
ASP-DAC 2005: 495-498 |
| 4 | | Sudeep Pasricha,
Nikil D. Dutt,
Elaheh Bozorgzadeh,
Mohamed Ben-Romdhane:
Floorplan-aware automated synthesis of bus-based communication architectures.
DAC 2005: 565-570 |
| 2004 |
|---|
| 3 | | Sudeep Pasricha,
Nikil D. Dutt,
Mohamed Ben-Romdhane:
Fast exploration of bus-based on-chip communication architectures.
CODES+ISSS 2004: 242-247 |
| 2 | | Sudeep Pasricha,
Nikil D. Dutt,
Mohamed Ben-Romdhane:
Extending the transaction level modeling approach for fast communication architecture exploration.
DAC 2004: 113-118 |
| 1 | | Francine Bacchini,
Pierre G. Paulin,
Reinaldo A. Bergamaschi,
Raj Pawate,
Arie Bernstein,
Ramesh Chandra,
Mohamed Ben-Romdhane:
System level design: six success stories in search of an industry.
DAC 2004: 349-350 |
