Lars Bengtsson

	2009
16		Åke Walldius, Yngve Sundblad, Lars Bengtsson, Bengt L. Sandblad, Jan Gulliksen: User certification of workplace software: assessing both artefact and usage. Behaviour & IT 28(2): 101-120 (2009)
15		Andreas Persson, Lars Bengtsson: Forward and Reverse Converters and Moduli Set Selection in Signed-Digit Residue Number Systems. Signal Processing Systems 56(1): 1-15 (2009)
	2008
14		Björn Nilsson, Lars Bengtsson, Bertil Svensson: Selecting back off algorithm in active RFID CSMA/CA based medium-access protocols. SIES 2008: 265-270
	2007
13		Minh Quang Do, Mindaugas Drazdziulis, Per Larsson-Edefors, Lars Bengtsson: Leakage-Conscious Architecture-Level Power Estimation for Partitioned and Power-Gated SRAM Arrays. ISQED 2007: 185-191
12		Björn Nilsson, Lars Bengtsson, Per-Arne Wiberg, Bertil Svensson: Protocols for Active RFID - The Energy Consumption Aspect. SIES 2007: 41-48
	2006
11		Andreas Persson, Lars Bengtsson: Reverse conversion architectures for signed-digit residue number systems. ISCAS 2006
10		Minh Quang Do, Mindaugas Drazdziulis, Per Larsson-Edefors, Lars Bengtsson: Parameterizable Architecture-Level SRAM Power Model Using Circuit-Simulation Backend for Leakage Calibration. ISQED 2006: 557-563
	2005
9		Niklas Therning, Lars Bengtsson: Jalapeno: secentralized grid computing using peer-to-peer technology. Conf. Computing Frontiers 2005: 59-65
8		Andreas Lindahl, Lars Bengtsson: A Low-Power FIR Filter Using Combined Residue and Radix-2 Signed-Digit Representation. DSD 2005: 42-47
	2004
7		Minh Quang Do, Per Larsson-Edefors, Lars Bengtsson: Table-Based Total Power Consumption Estimation of Memory Arrays for Architects. PATMOS 2004: 869-878
	2003
6		Minh Quang Do, Lars Bengtsson, Per Larsson-Edefors: DSP-PP: A Simulator/Estimator of Power Consumption and Performance for Parallel DSP Architectures. Applied Informatics 2003: 767-772
5		Anders Lindström, Michael Nordseth, Lars Bengtsson, Amos Omondi: Arithmetic Circuits Combining Residue and Signed-Digit Representations. Asia-Pacific Computer Systems Architecture Conference 2003: 246-257
4		Lars Bengtsson: A VLSI Array Architecture for Artificial Neural Networks. Neural Networks and Computational Intelligence 2003: 50-57
	2001
3		Stefan Lund, Lars Bengtsson: Synchronizing a High-Speed SIMD Processor Array. DSD 2001: 376-381
	1999
2		Lars Bengtsson: Clock Speed Limitation and Timing in a Radar Signal Processing Architecture. SIP 1999: 372-377
	1993
1		Lars Bengtsson, Kenneth Nilsson, Bertil Svensson: A processor array module for distributed, massively parallel, embedded computing. Microprocessing and Microprogramming 38(1-5): 529-537 (1993)

Coauthor Index

1	Minh Quang Do	[6] [7] [10] [13]
2	Mindaugas Drazdziulis	[10] [13]
3	Jan Gulliksen	[16]
4	Per Larsson-Edefors	[6] [7] [10] [13]
5	Andreas Lindahl	[8]
6	Anders Lindström	[5]
7	Stefan Lund	[3]
8	Björn Nilsson	[12] [14]
9	Kenneth Nilsson	[1]
10	Michael Nordseth	[5]
11	Amos Omondi	[5]
12	Andreas Persson	[11] [15]
13	Bengt L. Sandblad	[16]
14	Yngve Sundblad	[16]
15	Bertil Svensson	[1] [12] [14]
16	Niklas Therning	[9]
17	Åke Walldius	[16]
18	Per-Arne Wiberg	[12]

Colors in the list of coauthors