Khaled Benkrid

	2009
28		Server Kasap, Khaled Benkrid, Ying Liu: A high performance fpga-based implementation of position specific iterated blast. FPGA 2009: 249-252
	2008
27		Server Kasap, Khaled Benkrid, Ying Liu: High performance FPGA-based core for BLAST sequence alignment with the two-hit method. BIBE 2008: 1-7
26		Arjun K. Pai, Khaled Benkrid: Multi-Criteria Optimization and Performance Measurement of Domain-Specific Reconfigurable Architectures Targeting Image and Video Processing Applications. ERSA 2008: 285-288
25		Xiang Tian, Khaled Benkrid, Xiaochen Gu: High Performance Monte-Carlo Based Option Pricing on FPGAs. Engineering Letters 16(3): 434-442 (2008)
24		Server Kasap, Khaled Benkrid, Ying Liu: Design and Implementation of an FPGA-based Core for Gapped BLAST Sequence Alignment with the Two-Hit Method. Engineering Letters 16(3): 443-452 (2008)
23		Abdsamad Benkrid, Khaled Benkrid: HIDE+: A Logic Based Hardware Development Environment. Engineering Letters 16(3): 460-468 (2008)
	2007
22		Arjun K. Pai, Khaled Benkrid: Power Efficient Domain-Specific Reconfigurable Architectures for System-on-Chip Applications. ERSA 2007: 252-258
21		Khaled Benkrid, Ying Liu, Abdsamad Benkrid: Design and Implementation of a Highly Parameterised FPGA-Based Skeleton for Pairwise Biological Sequence Alignment. FCCM 2007: 275-278
20		Khaled Benkrid, Abdsamad Benkrid, S. Belkacemi: Efficient FPGA hardware development: A multi-language approach. Journal of Systems Architecture 53(4): 184-209 (2007)
	2006
19		Khaled Benkrid, S. Belkacemi, Abdsamad Benkrid: HIDE: A hardware intelligent description environment. Microprocessors and Microsystems 30(6): 283-300 (2006)
18		Abdsamad Benkrid, Khaled Benkrid: Handling finite length signals borders in two-channel multirate filter banks for perfect reconstruction. Signal Processing 86(2): 375-387 (2006)
	2005
17		Arjun K. Pai, Khaled Benkrid, Danny Crookes: Embedded Reconfigurable DCT Architectures Using Adder-Based Distributed Arithmetic. CAMP 2005: 81-86
16		Khaled Benkrid, S. Belkacemi: An integrated framework for the high level design of high performance signal processing circuits on FPGAs (abstract only). FPGA 2005: 278
	2004
15		Abdsamad Benkrid, Khaled Benkrid, Danny Crookes: Design and Implementation of Novel FIR Filter Architecture for Efficient Signal Boundary Handling on Xilinx VIRTEX FPGAs. ISVLSI 2004: 222-225
14		S. Sukhsawas, Khaled Benkrid: A High-Level Implementation of a High Performance Pipeline FFT on Virtex-E FPGAs. ISVLSI 2004: 229-232
13		Khaled Benkrid, Danny Crookes: From application descriptions to hardware in seconds: a logic-based approach to bridging the gap. IEEE Trans. VLSI Syst. 12(4): 420-436 (2004)
	2003
12		Abdsamad Benkrid, Khaled Benkrid, Danny Crookes: Design and Implementation of a Generic 2-D Orthogonal Discrete Wavelet Transform on FPGA. FCCM 2003: 162-172
11		Abdsamad Benkrid, Khaled Benkrid, Danny Crookes: A Novel FIR Filter Architecture for Efficient Signal Boundary Handling on Xilinx VIRTEX FPGAs. FCCM 2003: 273-275
10		S. Belkacemi, Khaled Benkrid, Danny Crookes: A Logic Based Hardware Development Environment. FCCM 2003: 280-281
9		Khaled Benkrid, S. Belkacemi, Danny Crookes: A logic based approach to hardware abstraction. FPGA 2003: 238
8		Khaled Benkrid, S. Sukhsawas, Danny Crookes, S. Belkacemi: A single-FPGA implementation of image connected component labelling. FPGA 2003: 238
7		Abdsamad Benkrid, Danny Crookes, Khaled Benkrid: Design framework for the implementation of the 2-D orthogonal discrete wavelet transform on FPGA. FPGA 2003: 238
6		Khaled Benkrid, S. Sukhsawas, Danny Crookes, Abdsamad Benkrid: An FPGA-Based Image Connected Component Labeller. FPL 2003: 1012-1015
5		Abdsamad Benkrid, Khaled Benkrid, Danny Crookes: Design and Implementation of a Novel FIR Filter Architecture with Boundary Handling on Xilinx VIRTEX FPGAs. FPL 2003: 553-564
	2002
4		Khaled Benkrid, Danny Crookes, Abdsamad Benkrid, S. Belkacemi: A Prolog-Based Hardware Development Environment. FPL 2002: 370-380
3		Khaled Benkrid, Danny Crookes, Abdsamad Benkrid: Design and implementation of a novel algorithm for general purpose median filtering on FPGAs. ISCAS (4) 2002: 425-428
2		Khaled Benkrid, Danny Crookes, Abdsamad Benkrid: Towards a general framework for FPGA based image processing using hardware skeletons. Parallel Computing 28(7-8): 1141-1154 (2002)
	1999
1		Ahmed Bouridane, Danny Crookes, Paul Donachy, Khalid Alotaibi, Khaled Benkrid: A high level FPGA-based abstract machine for image processing. Journal of Systems Architecture 45(10): 809-824 (1999)

Coauthor Index

1	Khalid Alotaibi	[1]
2	S. Belkacemi	[4] [8] [9] [10] [16] [19] [20]
3	Abdsamad Benkrid	[2] [3] [4] [5] [6] [7] [11] [12] [15] [18] [19] [20] [21] [23]
4	Ahmed Bouridane	[1]
5	Danny Crookes	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [15] [17]
6	Paul Donachy	[1]
7	Xiaochen Gu	[25]
8	Server Kasap	[24] [27] [28]
9	Ying Liu	[21] [24] [27] [28]
10	Arjun K. Pai	[17] [22] [26]
11	S. Sukhsawas	[6] [8] [14]
12	Xiang Tian	[25]

Colors in the list of coauthors