Khaled Benkrid

	2012
49		Xiang Tian, Khaled Benkrid: Implementation of the Longstaff and Schwartz American Option Pricing Model on FPGA. Signal Processing Systems 67(1): 79-91 (2012)
	2011
48		Xabier Iturbe, Khaled Benkrid, Tughrul Arslan, Mikel Azkarate-askasua, Imanol Martinez: A (Fault-Tolerant)2 Scheduler for Real-Time HW Tasks. ARC 2011: 79-87
47		Xabier Iturbe, Khaled Benkrid, Tughrul Arslan, Raul Torrego, Imanol Martinez: Methods and Mechanisms for Hardware Multitasking: Executing and Synchronizing Fully Relocatable Hardware Tasks in Xilinx FPGAs. FPL 2011: 295-300
46		Xabier Iturbe, Khaled Benkrid, Ali Ebrahim, Chuan Hong, Tughrul Arslan, Imanol Martinez: Snake: An Efficient Strategy for the Reuse of Circuitry and Partial Computation Results in High-Performance Reconfigurable Computing. ReConFig 2011: 182-189
45		Xabier Iturbe, Khaled Benkrid, Tughrul Arslan, Chuan Hong, Imanol Martinez: Empty Resource Compaction Algorithms for Real-Time Hardware Tasks Placement on Partially Reconfigurable FPGAs Subject to Fault Ocurrence. ReConFig 2011: 27-34
44		Hanaa M. Hussain, Khaled Benkrid, Ahmet T. Erdogan, Huseyin Seker: Highly Parameterized K-means Clustering on FPGAs: Comparative Results with GPPs and GPUs. ReConFig 2011: 475-480
43		Chuan Hong, Khaled Benkrid, Xabier Iturbe, Ali Ebrahim, Tughrul Arslan: Efficient On-Chip Task Scheduler and Allocator for Reconfigurable Operating Systems. Embedded Systems Letters 3(3): 85-88 (2011)
42		Server Kasap, Khaled Benkrid: High Performance Phylogenetic Analysis With Maximum Parsimony on Reconfigurable Hardware. IEEE Trans. VLSI Syst. 19(5): 796-808 (2011)
	2010
41		Keisuke Dohi, Khaled Benkrid, Cheng Ling, Tsuyoshi Hamada, Yuichiro Shibata: Highly efficient mapping of the Smith-Waterman algorithm on CUDA-compatible GPUs. ASAP 2010: 29-36
40		Xabier Iturbe, Khaled Benkrid, Tughrul Arslan, Imanol Martinez, Mikel Azkarate-askasua, Marco D. Santambrogio: A Roadmap for Autonomous Fault-Tolerant Systems. DASIP 2010: 311-321
39		Xabier Iturbe, Khaled Benkrid, Tughrul Arslan, Imanol Martinez, Mikel Azkarate-askasua, Alicia Morales-Reyes: Evolutionary Dynamic Allocation of Relocatable Modules onto Partially Damaged Xilinx FPGAs. ERSA 2010: 211-217
38		Xabier Iturbe, Khaled Benkrid, Tughrul Arslan, Imanol Martinez, Mikel Azkarate-askasua: ATB: Area-Time response Balancing algorithm for scheduling real-time hardware tasks. FPT 2010: 224-232
37		Xiang Tian, Khaled Benkrid: Fixed-Point Arithmetic Error Estimation in Monte-Carlo Simulations. ReConFig 2010: 202-207
36		Cheng Ling, Khaled Benkrid: Design and implementation of a CUDA-compatible GPU-based core for gapped BLAST algorithm. Procedia CS 1(1): 495-504 (2010)
35		Xiang Tian, Khaled Benkrid: High-Performance Quasi-Monte Carlo Financial Simulation: FPGA vs. GPP vs. GPU. TRETS 3(4): 26 (2010)
	2009
34		Server Kasap, Khaled Benkrid, Ying Liu: A high performance fpga-based implementation of position specific iterated blast. FPGA 2009: 249-252
33		Cheng Ling, Khaled Benkrid, Tsuyoshi Hamada: A parameterisable and scalable Smith-Waterman algorithm implementation on CUDA-compatible GPUs. SASP 2009: 94-100
32		Tsuyoshi Hamada, Keigo Nitadori, Khaled Benkrid, Yousuke Ohno, Gentaro Morimoto, Tomonari Masada, Yuichiro Shibata, Kiyoshi Oguri, Makoto Taiji: A novel multiple-walk parallel algorithm for the Barnes-Hut treecode on GPUs - towards cost effective, high performance N-body simulation. Computer Science - R&D 24(1-2): 21-31 (2009)
31		Khaled Benkrid, Ying Liu, Abdsamad Benkrid: A Highly Parameterized and Efficient FPGA-Based Skeleton for Pairwise Biological Sequence Alignment. IEEE Trans. VLSI Syst. 17(4): 561-570 (2009)
30		Abdsamad Benkrid, Khaled Benkrid: Novel Area-Efficient FPGA Architectures for FIR Filtering With Symmetric Signal Extension. IEEE Trans. VLSI Syst. 17(5): 709-722 (2009)
	2008
29		Server Kasap, Khaled Benkrid, Ying Liu: High performance FPGA-based core for BLAST sequence alignment with the two-hit method. BIBE 2008: 1-7
28		Arjun K. Pai, Khaled Benkrid: Multi-Criteria Optimization and Performance Measurement of Domain-Specific Reconfigurable Architectures Targeting Image and Video Processing Applications. ERSA 2008: 285-288
27		Xiang Tian, Khaled Benkrid, Xiaochen Gu: High Performance Monte-Carlo Based Option Pricing on FPGAs. Engineering Letters 16(3): 434-442 (2008)
26		Server Kasap, Khaled Benkrid, Ying Liu: Design and Implementation of an FPGA-based Core for Gapped BLAST Sequence Alignment with the Two-Hit Method. Engineering Letters 16(3): 443-452 (2008)
25		Abdsamad Benkrid, Khaled Benkrid: HIDE+: A Logic Based Hardware Development Environment. Engineering Letters 16(3): 460-468 (2008)
	2007
24		Arjun K. Pai, Khaled Benkrid: Power Efficient Domain-Specific Reconfigurable Architectures for System-on-Chip Applications. ERSA 2007: 252-258
23		Khaled Benkrid, Ying Liu, Abdsamad Benkrid: Design and Implementation of a Highly Parameterised FPGA-Based Skeleton for Pairwise Biological Sequence Alignment. FCCM 2007: 275-278
22		Khaled Benkrid, Ying Liu, Abdsamad Benkrid: High Performance Biosequence Database Scanning using FPGAs. ICASSP (1) 2007: 361-364
21		Khaled Benkrid, Abdsamad Benkrid, S. Belkacemi: Efficient FPGA hardware development: A multi-language approach. Journal of Systems Architecture 53(4): 184-209 (2007)
	2006
20		Khaled Benkrid, S. Belkacemi, Abdsamad Benkrid: HIDE: A hardware intelligent description environment. Microprocessors and Microsystems 30(6): 283-300 (2006)
19		Abdsamad Benkrid, Khaled Benkrid: Handling finite length signals borders in two-channel multirate filter banks for perfect reconstruction. Signal Processing 86(2): 375-387 (2006)
	2005
18		Arjun K. Pai, Khaled Benkrid, Danny Crookes: Embedded Reconfigurable DCT Architectures Using Adder-Based Distributed Arithmetic. CAMP 2005: 81-86
17		Khaled Benkrid, S. Belkacemi: An integrated framework for the high level design of high performance signal processing circuits on FPGAs (abstract only). FPGA 2005: 278
	2004
16		Abdsamad Benkrid, Khaled Benkrid, Danny Crookes: Design and Implementation of Novel FIR Filter Architecture for Efficient Signal Boundary Handling on Xilinx VIRTEX FPGAs. ISVLSI 2004: 222-225
15		S. Sukhsawas, Khaled Benkrid: A High-Level Implementation of a High Performance Pipeline FFT on Virtex-E FPGAs. ISVLSI 2004: 229-232
14		Khaled Benkrid, Danny Crookes: From application descriptions to hardware in seconds: a logic-based approach to bridging the gap. IEEE Trans. VLSI Syst. 12(4): 420-436 (2004)
	2003
13		Abdsamad Benkrid, Khaled Benkrid, Danny Crookes: Design and Implementation of a Generic 2-D Orthogonal Discrete Wavelet Transform on FPGA. FCCM 2003: 162-172
12		Abdsamad Benkrid, Khaled Benkrid, Danny Crookes: A Novel FIR Filter Architecture for Efficient Signal Boundary Handling on Xilinx VIRTEX FPGAs. FCCM 2003: 273-275
11		S. Belkacemi, Khaled Benkrid, Danny Crookes: A Logic Based Hardware Development Environment. FCCM 2003: 280-281
10		Khaled Benkrid, S. Belkacemi, Danny Crookes: A logic based approach to hardware abstraction. FPGA 2003: 238
9		Khaled Benkrid, S. Sukhsawas, Danny Crookes, S. Belkacemi: A single-FPGA implementation of image connected component labelling. FPGA 2003: 238
8		Abdsamad Benkrid, Danny Crookes, Khaled Benkrid: Design framework for the implementation of the 2-D orthogonal discrete wavelet transform on FPGA. FPGA 2003: 238
7		Khaled Benkrid, S. Sukhsawas, Danny Crookes, Abdsamad Benkrid: An FPGA-Based Image Connected Component Labeller. FPL 2003: 1012-1015
6		Abdsamad Benkrid, Khaled Benkrid, Danny Crookes: Design and Implementation of a Novel FIR Filter Architecture with Boundary Handling on Xilinx VIRTEX FPGAs. FPL 2003: 553-564
5		Khaled Benkrid, Danny Crookes: New bit-level algorithm for general purpose median filtering. J. Electronic Imaging 12(2): 263-269 (2003)
	2002
4		Khaled Benkrid, Danny Crookes, Abdsamad Benkrid, S. Belkacemi: A Prolog-Based Hardware Development Environment. FPL 2002: 370-380
3		Khaled Benkrid, Danny Crookes, Abdsamad Benkrid: Design and implementation of a novel algorithm for general purpose median filtering on FPGAs. ISCAS (4) 2002: 425-428
2		Khaled Benkrid, Danny Crookes, Abdsamad Benkrid: Towards a general framework for FPGA based image processing using hardware skeletons. Parallel Computing 28(7-8): 1141-1154 (2002)
	1999
1		Ahmed Bouridane, Danny Crookes, Paul Donachy, Khalid Alotaibi, Khaled Benkrid: A high level FPGA-based abstract machine for image processing. Journal of Systems Architecture 45(10): 809-824 (1999)

Coauthor Index

1	Khalid Alotaibi	[1]
2	Tughrul Arslan	[38] [39] [40] [43] [45] [46] [47] [48]
3	Mikel Azkarate-askasua	[38] [39] [40] [48]
4	S. Belkacemi	[4] [9] [10] [11] [17] [20] [21]
5	Abdsamad Benkrid	[2] [3] [4] [6] [7] [8] [12] [13] [16] [19] [20] [21] [22] [23] [25] [30] [31]
6	Ahmed Bouridane	[1]
7	Danny Crookes	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [16] [18]
8	Keisuke Dohi	[41]
9	Paul Donachy	[1]
10	Ali Ebrahim	[43] [46]
11	Ahmet T. Erdogan	[44]
12	Xiaochen Gu	[27]
13	Tsuyoshi Hamada	[32] [33] [41]
14	Chuan Hong	[43] [45] [46]
15	Hanaa M. Hussain	[44]
16	Xabier Iturbe	[38] [39] [40] [43] [45] [46] [47] [48]
17	Server Kasap	[26] [29] [34] [42]
18	Cheng Ling	[33] [36] [41]
19	Ying Liu	[22] [23] [26] [29] [31] [34]
20	Imanol Martinez	[38] [39] [40] [45] [46] [47] [48]
21	Tomonari Masada	[32]
22	Alicia Morales-Reyes	[39]
23	Gentaro Morimoto	[32]
24	Keigo Nitadori	[32]
25	Kiyoshi Oguri	[32]
26	Yousuke Ohno	[32]
27	Arjun K. Pai	[18] [24] [28]
28	Marco D. Santambrogio	[40]
29	Huseyin Seker	[44]
30	Yuichiro Shibata	[32] [41]
31	S. Sukhsawas	[7] [9] [15]
32	Makoto Taiji	[32]
33	Xiang Tian	[27] [35] [37] [49]
34	Raul Torrego	[47]

Colors in the list of coauthors

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