Krzysztof S. Berezowski

	2009
5		Rooju Chokshi, Krzysztof S. Berezowski, Aviral Shrivastava, Stanislaw J. Piestrak: Exploiting residue number system for power-efficient digital signal processing in embedded processors. CASES 2009: 19-28
	2008
4		Ravishankar Rao, Sarma B. K. Vrudhula, Krzysztof S. Berezowski: Analytical results for design space exploration of multi-core processors employing thread migration. ISLPED 2008: 229-232
	2007
3		Krzysztof S. Berezowski, Sarma B. K. Vrudhula: Multiple-Valued Logic Circuits Design Using Negative Differential Resistance Devices. ISMVL 2007: 24
	2005
2		Krzysztof S. Berezowski, Sarma B. K. Vrudhula: Automatic Design of Binary and Multiple-Valued Logic Gates on RTD Series. DSD 2005: 139-143
	2001
1		Krzysztof S. Berezowski: Transistor Chainning with Integrated Dynamic Folding for 1-D Leaf Cell Synthesis. DSD 2001: 422-429

Coauthor Index

1	Rooju Chokshi	[5]
2	Stanislaw J. Piestrak	[5]
3	Ravishankar Rao	[4]
4	Aviral Shrivastava	[5]
5	Sarma B. K. Vrudhula	[2] [3] [4]