 | 2008 |
|---|
| 12 |       | Devesh B. Chokshi,
Purandar Bhaduri:
Modeling Fixed Priority Non-Preemptive Scheduling with Real-Time Calculus.
RTCSA 2008: 387-392 |
| 11 | | Purandar Bhaduri,
S. Ramesh:
Interface synthesis and protocol conversion.
Formal Asp. Comput. 20(2): 205-224 (2008) |
| 2006 |
|---|
| 10 | | Purandar Bhaduri,
S. Ramesh:
Synthesis of Synchronous Interfaces.
ACSD 2006: 208-216 |
| 9 |  | Rajiv Kumar Poddar,
Purandar Bhaduri:
Verification of Giotto based Embedded Control Systems.
Nord. J. Comput. 13(4): 266-293 (2006) |
| 2005 |
|---|
| 8 | | Purandar Bhaduri:
Synthesis of Interface Automata.
ATVA 2005: 338-353 |
| 7 | | Girish Keshav Palshikar,
Purandar Bhaduri:
Verification of Scenario-based Specifications using Templates.
Electr. Notes Theor. Comput. Sci. 118: 37-55 (2005) |
| 2004 |
|---|
| 6 | | Purandar Bhaduri,
S. Ramesh:
Model Checking of Statechart Models: Survey and Research Directions
CoRR cs.SE/0407038: (2004) |
| 2003 |
|---|
| 5 | | Ulka Shrotri,
Purandar Bhaduri,
R. Venkatesh:
Model Checking Visual Specification of Requirements.
SEFM 2003: 202-209 |
| 2002 |
|---|
| 4 | | Purandar Bhaduri,
R. Venkatesh,
Girish Keshav Palshikar:
Formal Techniques for Analysing Scenarios using Message Sequence Charts.
Electr. Notes Theor. Comput. Sci. 65(7): (2002) |
| 2001 |
|---|
| 3 | | R. Venkatesh,
Purandar Bhaduri,
Mathai Joseph:
Formalizing Models and Meta-models for System Development.
APSEC 2001: 155- |
| 1999 |
|---|
| 2 | | S. Ramesh,
Purandar Bhaduri:
Validation of Pipelined Processor Designs Using Esterel Tools: A Case Study.
CAV 1999: 84-95 |
| 1 | | Mangala Gowri Nanda,
Purandar Bhaduri,
Sundeep Oberoi,
Amitabha Sanyal:
An Application of Compiler Technology to the Year 2000 Problem.
Softw., Pract. Exper. 29(4): 359-377 (1999) |
