| 2009 | ||
|---|---|---|
| 31 | Nicolas Beucher, Normand Bélanger, Yvon Savaria, Guy Bois: High Acceleration for Video Processing Applications Using Specialized Instruction Set Based on Parallelism and Data Reuse. Signal Processing Systems 56(2-3): 155-165 (2009) | |
| 30 | Patrick Mahoney, Yvon Savaria, Guy Bois, Patrice Plante: Performance Characterization for the Implementation of Content Addressable Memories Based on Parallel Hashing Memories. T. HiPEAC 2: 307-325 (2009) | |
| 2008 | ||
| 29 | Sebastien Fontaine, Luc Filion, Guy Bois: Exploring ISS Abstractions for Embedded Software Design. DSD 2008: 651-655 | |
| 28 | Sebastien Fontaine, Sylvain Goyette, J. M. Pierre Langlois, Guy Bois: Acceleration of a 3D target tracking algorithm using an application specific instruction set processor. ICCD 2008: 255-259 | |
| 2007 | ||
| 27 | L. Moss, Maxime de Nanclas, Luc Filion, Sebastien Fontaine, Guy Bois, M. Aboulhamid: Seamless hardware/software performance co-monitoring in a codesign simulation environment with RTOS support. DATE 2007: 876-881 | |
| 26 | Mohamed H. Zaki, Ghiath Al Sammane, Sofiène Tahar, Guy Bois: Combining Symbolic Simulation and Interval Arithmetic for the Verification of AMS Designs. FMCAD 2007: 207-215 | |
| 25 | Mohamed H. Zaki, Sofiène Tahar, Guy Bois: Qualitative Abstraction based Verification for Analog Circuits. ISoLA 2007: 147-158 | |
| 2006 | ||
| 24 | Mohamed H. Zaki, Sofiène Tahar, Guy Bois: A practical approach for monitoring analog circuits. ACM Great Lakes Symposium on VLSI 2006: 330-335 | |
| 23 | Alena Tsikhanovich, Frédéric Rousseau, El Mostapha Aboulhamid, Guy Bois: Transaction Level Modeling in Hardware/Software System Design using .Net Framework. CCECE 2006: 140-143 | |
| 22 | Nicolas Beucher, Normand Bélanger, Yvon Savaria, Guy Bois: Motion Compensated Frame Rate Conversion Using a Specialized Instruction Set Processor. SiPS 2006: 130-135 | |
| 21 | Jérôme Chevalier, Maxime de Nanclas, Luc Filion, Olivier Benny, Mathieu Rondonneau, Guy Bois, El Mostapha Aboulhamid: A SystemC Refinement Methodology for Embedded Software. IEEE Design & Test of Computers 23(2): 148-158 (2006) | |
| 2005 | ||
| 20 | Alena Tsikhanovich, El Mostapha Aboulhamid, Guy Bois: A Methodology for Hw/Sw Specification and Simulation at Multiple Levels of Abstraction. IWSOC 2005: 24-29 | |
| 19 | Jean-Francois Thibeault, Mortimer Hubin, Francois Deslauriers, Patrick Samson, Guy Bois: A Reprogrammable SoC Design for a Real-Time Control Application. MSE 2005: 73-74 | |
| 2004 | ||
| 18 | D. Quinn, Bruno Lavigueur, Guy Bois, El Mostapha Aboulhamid: A System Level Exploration Platform and Methodology for Network Applications Based on Configurable Processors. DATE 2004: 364-371 | |
| 17 | James Lapalme, El Mostapha Aboulhamid, Gabriela Nicolescu, Luc Charest, François R. Boyer, J. P. David, Guy Bois: .NET Framework - A Solution for the Next Generation Tools for System-Level Modeling and Simulation. DATE 2004: 732-733 | |
| 16 | Luc Charest, El Mostapha Aboulhamid, Guy Bois: Using Design Patterns for Type Unification and Introspection in SystemC. IWSOC 2004: 45-50 | |
| 15 | S. Regimbal, Yvon Savaria, Guy Bois: Verification Strategy Determination Using Dependence Analysis of Transaction-Level Models. IWSOC 2004: 87-92 | |
| 14 | James Lapalme, El Mostapha Aboulhamid, Gabriela Nicolescu, Luc Charest, François R. Boyer, J. P. David, Guy Bois: ESys.Net: a new solution for embedded systems modeling and simulation. LCTES 2004: 107-114 | |
| 2003 | ||
| 13 | Marc Bertola, Guy Bois: A methodology for the design of AHB bus master wrappers. DSD 2003: 90-97 | |
| 12 | Jérôme Chevalier, Mathieu Rondonneau, Olivier Benny, Guy Bois, El Mostapha Aboulhamid, François R. Boyer: SPACE: A Hardware/Software SystemC Modeling Platform Including an RTOS. FDL 2003: 704-716 | |
| 11 | S. Regimbal, Jean-Francois Lemire, Yvon Savaria, Guy Bois, El Mostapha Aboulhamid, A. Baron: Automating Functional Coverage Analysis Based on an Executable Specification. IWSOC 2003: 228-234 | |
| 10 | Marc Bertola, Guy Bois: Teaching Bus Architectures with a Basic, Hands-On SOC Platform. MSE 2003: 68- | |
| 2001 | ||
| 9 | Luc Charest, Michel Reid, El Mostapha Aboulhamid, Guy Bois: A methodology for interfacing open source systemC with a third party software. DATE 2001: 16 | |
| 8 | Mohamed Nekili, Yvon Savaria, Guy Bois: Minimizing process-induced skew using delay tuning. ISCAS (4) 2001: 426-429 | |
| 1999 | ||
| 7 | B. Le Chapelain, A. Mechain, Yvon Savaria, Guy Bois: Development of a high performance TSPC library for implementation of large digital building blocks. ISCAS (1) 1999: 443-446 | |
| 6 | B. Bosi, Guy Bois, Yvon Savaria: Reconfigurable pipelined 2-D convolvers for fast digital signal processing. IEEE Trans. VLSI Syst. 7(3): 299-308 (1999) | |
| 1998 | ||
| 5 | Manoucher Shaditalab, Guy Bois, Mohamad Sawan: Self Sorting Radix_2 FFT on FPGA using Parallel Pipelined Distributed Arithmetic Blocks. FCCM 1998: 337-338 | |
| 4 | Mohamed Nekili, Yvon Savaria, Guy Bois: Design of Clock Distribution Networks in Presence of Process Variations. Great Lakes Symposium on VLSI 1998: 95-102 | |
| 1997 | ||
| 3 | Mohamed Nekili, Guy Bois, Yvon Savaria: Pipelined H-trees for high-speed clocking of large integrated systems in presence of process variations. IEEE Trans. VLSI Syst. 5(2): 161-174 (1997) | |
| 1996 | ||
| 2 | Guy Bois, Eduard Cerny: Efficient generation of diagonal constraints for 2-D mask compaction. IEEE Trans. on CAD of Integrated Circuits and Systems 15(9): 1119-1126 (1996) | |
| 1994 | ||
| 1 | Mohamed Nekili, Yvon Savaria, Guy Bois: A Fast Low-Power Driver for Long Interconnections in VLSI Systems. ISCAS 1994: 343-346 | |