| 2001 | ||
|---|---|---|
| 3 | Lounis Kessal, R. Bourguiba, Didier Demigny, N. Boudouani, M. Karabernou: Reconfigurable Architecture Using High Speed FPGA. VLSI-SOC 2001: 75-86 | |
| 2000 | ||
| 2 | Didier Demigny, Lounis Kessal, R. Bourguiba, N. Boudouani: How to Use High Speed Reconfigurable FPGA for Real Time Image Processing? CAMP 2000: 240- | |
| 1 | Lounis Kessal, Didier Demigny, N. Boudouani, R. Bourgiba: Reconfigurable Hardware for Real Time Image Processing. ICIP 2000 | |
| 1 | R. Bourgiba | [1] |
| 2 | R. Bourguiba | [2] [3] |
| 3 | Didier Demigny | [1] [2] [3] |
| 4 | M. Karabernou | [3] |
| 5 | Lounis Kessal | [1] [2] [3] |