Keith A. Bowman

	2009
13		Keith A. Bowman, James Tschanz, Chris Wilkerson, Shih-Lien Lu, Tanay Karnik, Vivek De, Shekhar Y. Borkar: Circuit techniques for dynamic variation tolerance. DAC 2009: 4-7
	2007
12		Steven M. Burns, Mahesh Ketkar, Noel Menezes, Keith A. Bowman, James Tschanz, Vivek De: Comparative Analysis of Conventional and Statistical Design Techniques. DAC 2007: 238-243
11		Keith A. Bowman, Alaa R. Alameldeen, Srikanth T. Srinivasan, Chris Wilkerson: Impact of die-to-die and within-die parameter variations on the throughput distribution of multi-core processors. ISLPED 2007: 50-55
	2006
10		Keith A. Bowman, James Tschanz, Muhammad M. Khellah, Maged Ghoneima, Yehea I. Ismail, Vivek De: Time-borrowing multi-cycle on-chip interconnects for delay variation tolerance. ISLPED 2006: 79-84
9		Keith A. Bowman, Michael Orshansky, Sachin S. Sapatnekar: Tutorial II: Variability and Its Impact on Design. ISQED 2006: 5
8		Osman S. Unsal, James Tschanz, Keith A. Bowman, Vivek De, Xavier Vera, Antonio González, Oguz Ergin: Impact of Parameter Variations on Circuits and Microarchitecture. IEEE Micro 26(6): 30-39 (2006)
	2005
7		James Tschanz, Keith A. Bowman, Vivek De: Variation-tolerant circuits: circuit solutions and techniques. DAC 2005: 762-763
6		Peter Suaris, Taeho Kgil, Keith A. Bowman, Vivek De, Trevor N. Mudge: Total power-optimal pipelining and parallel processing under process variations in nanometer technology. ICCAD 2005: 535-540
5		Ali Keshavarzi, Gerhard Schrom, Stephen Tang, Sean Ma, Keith A. Bowman, Sunit Tyagi, Kevin Zhang, Tom Linton, Nagib Hakim, Steven G. Duvall, John Brews, Vivek De: Measurements and modeling of intrinsic fluctuations in MOSFET threshold voltage. ISLPED 2005: 26-29
	2001
4		Raguraman Venkatesan, Jeffrey A. Davis, Keith A. Bowman, James D. Meindl: Optimal n-tier multilevel interconnect architectures for gigascale integration (GSI). IEEE Trans. VLSI Syst. 9(6): 899-912 (2001)
	2000
3		Raguraman Venkatesan, Jeffrey A. Davis, Keith A. Bowman, James D. Meindl: Minimum power and area n-tier multilevel interconnect architectures using optimal repeater insertion. ISLPED 2000: 167-172
2		Jeffrey A. Davis, Raguraman Venkatesan, Keith A. Bowman, James D. Meindl: Gigascale integration (GSI) interconnect limits and n-tier multilevel interconnect architectural solutions (discussion session). SLIP 2000: 147-148
1		Azeez J. Bhavnagarwala, Blanca Austin, Keith A. Bowman, James D. Meindl: A minimum total power methodology for projecting limits on CMOS GSI. IEEE Trans. VLSI Syst. 8(3): 235-251 (2000)

Coauthor Index

1	Alaa R. Alameldeen	[11]
2	Blanca Austin	[1]
3	Azeez J. Bhavnagarwala	[1]
4	Shekhar Y. Borkar (Shekhar Borkar)	[13]
5	John Brews	[5]
6	Steven M. Burns	[12]
7	Jeffrey A. Davis	[2] [3] [4]
8	Vivek De	[5] [6] [7] [8] [10] [12] [13]
9	Steven G. Duvall	[5]
10	Oguz Ergin	[8]
11	Maged Ghoneima	[10]
12	Antonio González	[8]
13	Nagib Hakim	[5]
14	Yehea I. Ismail	[10]
15	Tanay Karnik	[13]
16	Ali Keshavarzi	[5]
17	Mahesh Ketkar	[12]
18	Taeho Kgil	[6]
19	Muhammad M. Khellah	[10]
20	Tom Linton	[5]
21	Shih-Lien Lu	[13]
22	Sean Ma	[5]
23	James D. Meindl	[1] [2] [3] [4]
24	Noel Menezes	[12]
25	Trevor N. Mudge	[6]
26	Michael Orshansky	[9]
27	Sachin S. Sapatnekar	[9]
28	Gerhard Schrom	[5]
29	Srikanth T. Srinivasan	[11]
30	Peter Suaris (Peter Ramyalal Suaris)	[6]
31	Stephen Tang	[5]
32	James Tschanz	[7] [8] [10] [12] [13]
33	Sunit Tyagi	[5]
34	Osman S. Unsal	[8]
35	Raguraman Venkatesan	[2] [3] [4]
36	Xavier Vera	[8]
37	Chris Wilkerson	[11] [13]
38	Kevin Zhang	[5]