 | 2008 |
|---|
| 7 |       | Holger Blume,
Jörg von Livonius,
Lisa Rotenberg,
Tobias G. Noll,
Harald Bothe,
Jörg Brakensiek:
OpenMP-based parallelization on an MPCore multiprocessor platform - A performance and power analysis.
Journal of Systems Architecture - Embedded Systems Design 54(11): 1019-1029 (2008) |
| 2007 |
|---|
| 6 | | Holger Blume,
Jörg von Livonius,
Lisa Rotenberg,
Tobias G. Noll,
Harald Bothe,
Jörg Brakensiek:
Performance and Power Analysis of Parallelized Implementations on an MPCore Multiprocessor Platform.
ICSAMOS 2007: 74-81 |
| 5 | | Holger Blume,
Daniel Becker,
Lisa Rotenberg,
Martin Botteck,
Jörg Brakensiek,
Tobias G. Noll:
Hybrid functional- and instruction-level power modeling for embedded and heterogeneous processor architectures.
Journal of Systems Architecture 53(10): 689-702 (2007) |
| 2006 |
|---|
| 4 | | Holger Blume,
Daniel Becker,
Martin Botteck,
Jörg Brakensiek,
Tobias G. Noll:
Hybrid Functional and Instruction Level Power Modeling for Embedded Processors.
SAMOS 2006: 216-226 |
| 2004 |
|---|
| 3 |  | Mihail Petrov,
Tudor Murgan,
Abdulfattah Mohammad Obeid,
Cristian Chitu,
Peter Zipf,
Jörg Brakensiek,
Manfred Glesner:
Dynamic power optimization of the trace-back process for the Viterbi algorithm.
ISCAS (2) 2004: 721-724 |
| 2003 |
|---|
| 2 | | Tudor Murgan,
Mihail Petrov,
Alberto García Ortiz,
Ralf Ludewig,
Peter Zipf,
Thomas Hollstein,
Manfred Glesner,
Bernard Ölkrug,
Jörg Brakensiek:
Evaluation and Run-Time Optimization of On-chip Communication Structures in Reconfigurable Architectures.
FPL 2003: 1111-1114 |
| 1 | | Mihail Petrov,
Abdulfattah Mohammad Obeid,
Tudor Murgan,
Peter Zipf,
Jörg Brakensiek,
Bernard Ölkrug,
Manfred Glesner:
An Adaptive Trace-Back Solution for State-Parallel Viterbi Decoders.
VLSI-SOC 2003: 167- |
