Doug Burger

	2009
73		Mark Gebhart, Bertrand A. Maher, Katherine E. Coons, Jeffrey R. Diamond, Paul Gratz, Mario Marino, Nitya Ranganathan, Behnam Robatmili, Aaron Smith, James H. Burrill, Stephen W. Keckler, Doug Burger, Kathryn S. McKinley: An evaluation of the TRIPS computer system. ASPLOS 2009: 1-12
72		Benjamin C. Lee, Engin Ipek, Onur Mutlu, Doug Burger: Architecting phase change memory as a scalable dram alternative. ISCA 2009: 2-13
71		Madhu Saravana Sibi Govindan, Stephen W. Keckler, Doug Burger: End-to-end validation of architectural power models. ISLPED 2009: 383-388
70		Nitya Ranganathan, Doug Burger, Stephen W. Keckler: Analysis of the TRIPS prototype block predictor. ISPASS 2009: 195-206
69		Jeremy Condit, Edmund B. Nightingale, Christopher Frost, Engin Ipek, Benjamin C. Lee, Doug Burger, Derrick Coetzee: Better I/O through byte-addressable, persistent memory. SOSP 2009: 133-146
	2008
68		Franziska Roesner, Doug Burger, Stephen W. Keckler: Counting Dependence Predictors. ISCA 2008: 215-226
67		Behnam Robatmili, Katherine E. Coons, Doug Burger, Kathryn S. McKinley: Register Bank Assignment for Spatially Partitioned Processors. LCPC 2008: 64-79
66		Haiming Liu, Michael Ferdman, Jaehyuk Huh, Doug Burger: Cache bursts: A new approach for eliminating dead blocks and increasing cache efficiency. MICRO 2008: 222-233
65		Behnam Robatmili, Katherine E. Coons, Doug Burger, Kathryn S. McKinley: Strategies for mapping dataflow blocks to distributed hardware. MICRO 2008: 23-34
64		Renée St. Amant, Daniel A. Jiménez, Doug Burger: Low-power, high-performance analog neural branch prediction. MICRO 2008: 447-458
63		Divya Gulati, Changkyu Kim, Simha Sethumadhavan, Stephen W. Keckler, Doug Burger: Multitasking workload scheduling on flexible-core chip multiprocessors. PACT 2008: 187-196
62		Katherine E. Coons, Behnam Robatmili, Matthew E. Taylor, Bertrand A. Maher, Doug Burger, Kathryn S. McKinley: Feature selection and policy optimization for distributed instruction placement using reinforcement learning. PACT 2008: 32-42
61		Jeffrey R. Diamond, Behnam Robatmili, Stephen W. Keckler, Robert A. van de Geijn, Kazushige Goto, Doug Burger: High performance dense linear algebra on a spatially distributed processor. PPOPP 2008: 63-72
	2007
60		Simha Sethumadhavan, Franziska Roesner, Joel S. Emer, Doug Burger, Stephen W. Keckler: Late-binding: enabling unordered load-store queues. ISCA 2007: 347-357
59		Changkyu Kim, Simha Sethumadhavan, M. S. Govindan, Nitya Ranganathan, Divya Gulati, Doug Burger, Stephen W. Keckler: Composable Lightweight Processors. MICRO 2007: 381-394
58		Paul Gratz, Karthikeyan Sankaralingam, Heather Hanson, Premkishore Shivakumar, Robert G. McDonald, Stephen W. Keckler, Doug Burger: Implementation and Evaluation of a Dynamically Routed Processor Operand Network. NOCS 2007: 7-17
57		Paul Gratz, Changkyu Kim, Karthikeyan Sankaralingam, Heather Hanson, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger: On-Chip Interconnection Networks of the TRIPS Chip. IEEE Micro 27(5): 41-50 (2007)
56		Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhang, Doug Burger, Stephen W. Keckler: A NUCA Substrate for Flexible CMP Cache Sharing. IEEE Trans. Parallel Distrib. Syst. 18(8): 1028-1040 (2007)
55		Nicholas Nethercote, Doug Burger, Kathryn S. McKinley: Convergent Compilation Applied to Loop Unrolling. T. HiPEAC 1: 140-158 (2007)
	2006
54		Katherine E. Coons, Xia Chen, Doug Burger, Kathryn S. McKinley, Sundeep K. Kushwaha: A spatial path scheduling algorithm for EDGE architectures. ASPLOS 2006: 129-140
53		Aaron Smith, Jon Gibson, Bertrand A. Maher, Nicholas Nethercote, Bill Yoder, Doug Burger, Kathryn S. McKinley, James H. Burrill: Compiling for EDGE Architectures. CGO 2006: 185-195
52		Simha Sethumadhavan, Robert G. McDonald, Rajagopalan Desikan, Doug Burger, Stephen W. Keckler: Design and Implementation of the TRIPS Primary Memory System. ICCD 2006
51		Paul Gratz, Changkyu Kim, Robert G. McDonald, Stephen W. Keckler, Doug Burger: Implementation and Evaluation of On-Chip Network Architectures. ICCD 2006
50		Ramadass Nagarajan, Xia Chen, Robert G. McDonald, Doug Burger, Stephen W. Keckler: Critical path analysis of the TRIPS architecture. ISPASS 2006: 37-47
49		Karthikeyan Sankaralingam, Ramadass Nagarajan, Robert G. McDonald, Rajagopalan Desikan, Saurabh Drolia, M. S. Govindan, Paul Gratz, Divya Gulati, Heather Hanson, Changkyu Kim, Haiming Liu, Nitya Ranganathan, Simha Sethumadhavan, Sadia Sharif, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger: Distributed Microarchitectural Protocols in the TRIPS Prototype Processor. MICRO 2006: 480-491
48		Bertrand A. Maher, Aaron Smith, Doug Burger, Kathryn S. McKinley: Merging Head and Tail Duplication for Convergent Hyperblock Formation. MICRO 2006: 65-76
47		Aaron Smith, Ramadass Nagarajan, Karthikeyan Sankaralingam, Robert G. McDonald, Doug Burger, Stephen W. Keckler, Kathryn S. McKinley: Dataflow Predication. MICRO 2006: 89-102
	2005
46		Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhang, Doug Burger, Stephen W. Keckler: A NUCA substrate for flexible CMP cache sharing. ICS 2005: 31-40
	2004
45		Rajagopalan Desikan, Simha Sethumadhavan, Doug Burger, Stephen W. Keckler: Scalable selective re-execution for EDGE architectures. ASPLOS 2004: 120-132
44		Jaehyuk Huh, Jichuan Chang, Doug Burger, Gurindar S. Sohi: Coherence decoupling: making use of incoherence. ASPLOS 2004: 97-106
43		Ramadass Nagarajan, Sundeep K. Kushwaha, Doug Burger, Kathryn S. McKinley, Calvin Lin, Stephen W. Keckler: Static Placement, Dynamic Issue (SPDI) Scheduling for EDGE Architectures. IEEE PACT 2004: 74-84
42		Doug Burger, James R. Goodman: Billion-Transistor Architectures: There and Back Again. IEEE Computer 37(3): 22-28 (2004)
41		Doug Burger, Stephen W. Keckler, Kathryn S. McKinley, Michael Dahlin, Lizy Kurian John, Calvin Lin, Charles R. Moore, James H. Burrill, Robert G. McDonald, William Yode: Scaling to the End of Silicon with EDGE Architectures. IEEE Computer 37(7): 44-55 (2004)
40		Jaehyuk Huh, Doug Burger, Jichuan Chang, Gurindar S. Sohi: Speculative Incoherent Cache Protocols. IEEE Micro 24(6): 104-109 (2004)
39		Simha Sethumadhavan, Rajagopalan Desikan, Doug Burger, Charles R. Moore, Stephen W. Keckler: Scalable Hardware Memory Disambiguation for High-ILP Processors. IEEE Micro 24(6): 118-127 (2004)
38		Doug Burger, Anand Sivasubramaniam: Tools for computer architecture research. SIGMETRICS Performance Evaluation Review 31(4): 2-3 (2004)
37		Doug Burger, Todd M. Austin, Stephen W. Keckler: Recent extensions to the SimpleScalar tool suite. SIGMETRICS Performance Evaluation Review 31(4): 4-7 (2004)
36		Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Nitya Ranganathan, Doug Burger, Stephen W. Keckler, Robert G. McDonald, Charles R. Moore: TRIPS: A polymorphous architecture for exploiting ILP, TLP, and DLP. TACO 1(1): 62-93 (2004)
	2003
35		Doug Burger: Designing Ultra-large Instruction Issue Windows. Asia-Pacific Computer Systems Architecture Conference 2003: 14-20
34		Doug Burger: Architectural versus physical solutions for on-chip communication challenges. CODES+ISSS 2003: 74
33		Karthikeyan Sankaralingam, Vincent Ajay Singh, Stephen W. Keckler, Doug Burger: Routed Inter-ALU Networks for ILP Scalability and Performance. ICCD 2003: 170-
32		Premkishore Shivakumar, Stephen W. Keckler, Charles R. Moore, Doug Burger: Exploiting Microarchitectural Redundancy For Defect Tolerance. ICCD 2003: 481-488
31		Zhenlin Wang, Doug Burger, Steven K. Reinhardt, Kathryn S. McKinley, Charles C. Weems: Guided Region Prefetching: A Cooperative Hardware/Software Approach. ISCA 2003: 388-398
30		Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Doug Burger, Stephen W. Keckler, Charles R. Moore: Exploiting ILP, TLP and DLP with the Polymorphous TRIPS Architecture. ISCA 2003: 422-433
29		Karthik Natarajan, Heather Hanson, Stephen W. Keckler, Charles R. Moore, Doug Burger: Microprocessor pipeline energy analysis. ISLPED 2003: 282-287
28		Karthikeyan Sankaralingam, Stephen W. Keckler, William R. Mark, Doug Burger: Universal Mechanisms for Data-Parallel Architectures. MICRO 2003: 303-314
27		Simha Sethumadhavan, Rajagopalan Desikan, Doug Burger, Charles R. Moore, Stephen W. Keckler: Scalable Hardware Memory Disambiguation for High ILP Processors. MICRO 2003: 399-410
26		Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Doug Burger, Stephen W. Keckler, Charles R. Moore: Exploiting ILP, TLP, and DLP with the Polymorphous TRIPS Architecture. IEEE Micro 23(6): 46-51 (2003)
25		Changkyu Kim, Doug Burger, Stephen W. Keckler: Nonuniform Cache Architectures for Wire-Delay Dominated On-Chip Caches. IEEE Micro 23(6): 99-107 (2003)
24		Deependra Talla, Lizy Kurian John, Doug Burger: Bottlenecks in Multimedia Processing with SIMD Style Extensions and Architectural Enhancements. IEEE Trans. Computers 52(8): 1015-1031 (2003)
23		Heather Hanson, M. S. Hrishikesh, Vikas Agarwal, Stephen W. Keckler, Doug Burger: Static energy reduction techniques for microprocessor caches. IEEE Trans. VLSI Syst. 11(3): 303-313 (2003)
	2002
22		Changkyu Kim, Doug Burger, Stephen W. Keckler: An adaptive, non-uniform cache structure for wire-delay dominated on-chip caches. ASPLOS 2002: 211-222
21		Premkishore Shivakumar, Michael Kistler, Stephen W. Keckler, Doug Burger, Lorenzo Alvisi: Modeling the Effect of Technology Trends on the Soft Error Rate of Combinational Logic. DSN 2002: 389-398
20		M. S. Hrishikesh, Doug Burger, Stephen W. Keckler, Premkishore Shivakumar, Norman P. Jouppi, Keith I. Farkas: The Optimal Logic Depth Per Pipeline Stage is 6 to 8 FO4 Inverter Delays. ISCA 2002: 14-24
19		Rajagopalan Desikan, Doug Burger, Stephen W. Keckler, Llorenc Cruz, Fernando Latorre, Antonio González, Mateo Valero: Errata on "Measuring Experimental Error in Microprocessor Simulation". SIGARCH Computer Architecture News 30(1): 2-4 (2002)
	2001
18		Wei-Fen Lin, Steven K. Reinhardt, Doug Burger: Reducing DRAM Latencies with an Integrated Memory Hierarchy Design. HPCA 2001: 301-312
17		Wei-Fen Lin, Steven K. Reinhardt, Doug Burger, Thomas R. Puzak: Filtering Superfluous Prefetches Using Density Vectors. ICCD 2001: 124-132
16		Heather Hanson, M. S. Hrishikesh, Vikas Agarwal, Stephen W. Keckler, Doug Burger: Static Energy Reduction Techniques for Microprocessor Caches. ICCD 2001: 276-283
15		Jaehyuk Huh, Doug Burger, Stephen W. Keckler: Exploring the Design Space of Future CMPs. IEEE PACT 2001: 199-210
14		Ramadass Nagarajan, Karthikeyan Sankaralingam, Doug Burger, Stephen W. Keckler: A design space evaluation of grid processor architectures. MICRO 2001: 40-51
13		Wei-Fen Lin, Steven K. Reinhardt, Doug Burger: Designing a Modern Memory Hierarchy with Hardware Prefetching. IEEE Trans. Computers 50(11): 1202-1218 (2001)
	2000
12		Vikas Agarwal, M. S. Hrishikesh, Stephen W. Keckler, Doug Burger: Clock rate versus IPC: the end of the road for conventional microarchitectures. ISCA 2000: 248-259
	1999
11		Stefanos Kaxiras, Doug Burger, James R. Goodman: DataScalar: A memory-centric approach to computing. Journal of Systems Architecture 45(12-13): 1001-1022 (1999)
	1997
10		Alain Kägi, Doug Burger, James R. Goodman: Efficient Synchronization: Let Them Eat QOLB. ISCA 1997: 170-180
9		Doug Burger, Stefanos Kaxiras, James R. Goodman: DataScalar Architectures. ISCA 1997: 338-349
8		Doug Burger, James R. Goodman, Gurindar S. Sohi: Memory Systems. The Computer Science and Engineering Handbook 1997: 447-461
7		Sarita V. Adve, Doug Burger, Rudolf Eigenmann, Alasdair Rawsthorne, Michael D. Smith, Catherine H. Gebotys, Mahmut T. Kandemir, David J. Lilja, Alok N. Choudhary, Jesse Zhixi Fang, Pen-Chung Yew: Changing Interaction of Compiler and Architecture. IEEE Computer 30(12): 51-58 (1997)
6		Doug Burger, James R. Goodman: Billion-Transistor Architectures - Guest Editors' Introduction. IEEE Computer 30(9): 46-49 (1997)
	1996
5		Doug Burger, James R. Goodman, Alain Kägi: Memory Bandwidth Limitations of Future Microprocessors. ISCA 1996: 78-89
4		Doug Burger: Memory Systems. ACM Comput. Surv. 28(1): 63-65 (1996)
	1995
3		Doug Burger, David A. Wood: Accuracy vs. performance in parallel simulation of interconnection networks. IPPS 1995: 22-31
2		Alain Kägi, Nagi Aboulenein, Doug Burger, James R. Goodman: Techniques for Reducing Overheads of Shared-Memory Multiprocessing. International Conference on Supercomputing 1995: 11-20
	1994
1		Doug Burger, Rahmat S. Hyder, Barton P. Miller, David A. Wood: Paging tradeoffs in distributed-shared-memory multiprocessors. SC 1994: 590-599

Coauthor Index

1	Nagi Aboulenein	[2]
2	Sarita V. Adve	[7]
3	Vikas Agarwal	[12] [16] [23]
4	Lorenzo Alvisi	[21]
5	Renée St. Amant	[64]
6	Todd M. Austin	[37]
7	James H. Burrill	[41] [53] [73]
8	Jichuan Chang	[40] [44]
9	Xia Chen	[50] [54]
10	Alok N. Choudhary	[7]
11	Derrick Coetzee	[69]
12	Jeremy Condit	[69]
13	Katherine E. Coons	[54] [62] [65] [67] [73]
14	Llorenc Cruz	[19]
15	Michael Dahlin	[41]
16	Rajagopalan Desikan	[19] [27] [39] [45] [49] [52]
17	Jeffrey R. Diamond	[61] [73]
18	Saurabh Drolia	[49]
19	Rudolf Eigenmann	[7]
20	Joel S. Emer	[60]
21	Jesse Zhixi Fang	[7]
22	Keith I. Farkas	[20]
23	Michael Ferdman	[66]
24	Christopher Frost	[69]
25	Mark Gebhart	[73]
26	Catherine H. Gebotys	[7]
27	Robert A. van de Geijn	[61]
28	Jon Gibson	[53]
29	Antonio González	[19]
30	James R. Goodman	[2] [5] [6] [8] [9] [10] [11] [42]
31	Kazushige Goto	[61]
32	Madhu Saravana Sibi Govindan (M. S. Govindan)	[49] [59] [71]
33	Paul Gratz	[49] [51] [57] [58] [73]
34	Divya Gulati	[49] [59] [63]
35	Heather Hanson	[16] [23] [29] [49] [57] [58]
36	M. S. Hrishikesh	[12] [16] [20] [23]
37	Jaehyuk Huh	[15] [26] [30] [36] [40] [44] [46] [56] [66]
38	Rahmat S. Hyder	[1]
39	Engin Ipek	[69] [72]
40	Daniel A. Jiménez	[64]
41	Lizy Kurian John (Lizy K. John)	[24] [41]
42	Norman P. Jouppi	[20]
43	Alain Kägi	[2] [5] [10]
44	Mahmut T. Kandemir	[7]
45	Stefanos Kaxiras	[9] [11]
46	Stephen W. Keckler	[12] [14] [15] [16] [19] [20] [21] [22] [23] [25] [26] [27] [28] [29] [30] [32] [33] [36] [37] [39] [41] [43] [45] [46] [47] [49] [50] [51] [52] [56] [57] [58] [59] [60] [61] [63] [68] [70] [71] [73]
47	Changkyu Kim	[22] [25] [26] [30] [36] [46] [49] [51] [56] [57] [59] [63]
48	Michael Kistler	[21]
49	Sundeep K. Kushwaha	[43] [54]
50	Fernando Latorre	[19]
51	Benjamin C. Lee	[69] [72]
52	David J. Lilja	[7]
53	Calvin Lin	[41] [43]
54	Wei-Fen Lin	[13] [17] [18]
55	Haiming Liu	[26] [30] [36] [49] [66]
56	Bertrand A. Maher	[48] [53] [62] [73]
57	Mario Marino	[73]
58	William R. Mark	[28]
59	Robert G. McDonald	[36] [41] [47] [49] [50] [51] [52] [58]
60	Kathryn S. McKinley	[31] [41] [43] [47] [48] [53] [54] [55] [62] [65] [67] [73]
61	Barton P. Miller	[1]
62	Charles R. Moore	[26] [27] [29] [30] [32] [36] [39] [41]
63	Onur Mutlu	[72]
64	Ramadass Nagarajan	[14] [26] [30] [36] [43] [47] [49] [50]
65	Karthik Natarajan	[29]
66	Nicholas Nethercote	[53] [55]
67	Edmund B. Nightingale	[69]
68	Thomas R. Puzak	[17]
69	Nitya Ranganathan	[36] [49] [59] [70] [73]
70	Alasdair Rawsthorne	[7]
71	Steven K. Reinhardt	[13] [17] [18] [31]
72	Behnam Robatmili	[61] [62] [65] [67] [73]
73	Franziska Roesner	[60] [68]
74	Karthikeyan Sankaralingam	[14] [26] [28] [30] [33] [36] [47] [49] [57] [58]
75	Simha Sethumadhavan	[27] [39] [45] [49] [52] [59] [60] [63]
76	Hazim Shafi	[46] [56]
77	Sadia Sharif	[49]
78	Premkishore Shivakumar	[20] [21] [32] [49] [57] [58]
79	Vincent Ajay Singh	[33]
80	Anand Sivasubramaniam	[38]
81	Aaron Smith	[47] [48] [53] [73]
82	Michael D. Smith	[7]
83	Gurindar S. Sohi	[8] [40] [44]
84	Deependra Talla	[24]
85	Matthew E. Taylor	[62]
86	Mateo Valero	[19]
87	Zhenlin Wang	[31]
88	Charles C. Weems	[31]
89	David A. Wood	[1] [3]
90	Pen-Chung Yew	[7]
91	William Yode	[41]
92	Bill Yoder	[53]
93	Lixin Zhang	[46] [56]