| 2003 | ||
|---|---|---|
| 5 | Bart Mesman, Qin Zhao, Natalino G. Busá, Katarzyna Leijten-Nowak: Reconfigurable Instruction-Set Application-Tuning for DSP. Journal of Circuits, Systems, and Computers 12(3): 333-352 (2003) | |
| 2002 | ||
| 4 | Natalino G. Busá, Ghiath Alkadi, Michael Verberne, Rafael Peset Llopis, Sethuraman Ramanatha: RAPIDO: A Modular, Multi-Board, Heterogeneous Multi-Processor, PCI Bus Based Prototyping Framework for the Validation of SoC VLSI Designs. IEEE International Workshop on Rapid System Prototyping 2002: 159-165 | |
| 3 | Carles Rodoreda Sala, Natalino G. Busá: A Run-Time Word-Level Reconfigurable Coarse-Grain Functional Unit for a VLIW Processor. ISSS 2002: 44-49 | |
| 2001 | ||
| 2 | Marco Bekooij, Loek J. M. Engels, Albert van der Werf, Natalino G. Busá: Functional units with conditional input/output behavior in VLIW processors. DATE 2001: 822 | |
| 2000 | ||
| 1 | Natalino G. Busá, Albert van der Werf, Marco Bekooij: Scheduling Coarse-Grain Operations for VLIW Processors. ISSS 2000: 47-54 | |