| 2007 | ||
|---|---|---|
| 38 | Wei Han, Kwok-Wai Hon, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: A Speech Recognition IC Using Hidden Markov Models with Continuous Observation Densities. VLSI Signal Processing 47(3): 223-232 (2007) | |
| 2006 | ||
| 37 | Wang-Chi Cheng, Cheong-fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy: Sub-1 V Current Mode CMOS Integrated Receiver Front-end for GPS System. APCCAS 2006: 195-198 | |
| 36 | Wang-Chi Cheng, Cheong-fat Chan, Suyi Tao, King-Keung Mok: 0.7 V Monolithic CMOS LNA for 802.11 A/B WLAN Application. APCCAS 2006: 25-28 | |
| 35 | King-Keung Mok, Ka-Hung Tsang, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: Adiabatic Smart Card. APCCAS 2006: 287-290 | |
| 34 | Wang-Chi Cheng, Cheong-fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy: 0.8 V GPS band CMOS VCO with 29% Tuning Range. APCCAS 2006: 522-525 | |
| 33 | Xiao-Yong He, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-fat Chan: A 0.5V fully differential OTA with local common feedback. ISCAS 2006 | |
| 32 | Chi-Hong Chan, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: A 6-digit CMOS current-mode analog-to-quaternary converter with RSD error correction algorithm. ISCAS 2006 | |
| 31 | Siu-Kei Tang, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-fat Chan: A fully differential low noise amplifier with real-time channel hopping for ultra-wideband wireless applications. ISCAS 2006 | |
| 30 | Wei Han, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: An efficient MFCC extraction method in speech recognition. ISCAS 2006 | |
| 29 | Pak-Keung Leung, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun: An optimal normal basis elliptic curve cryptoprocessor for inductive RFID application. ISCAS 2006 | |
| 28 | Ke Xu, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: Power-efficient VLSI implementation of bitstream parsing in H.264/AVC decoder. ISCAS 2006 | |
| 2005 | ||
| 27 | Pui-Tak So, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun: Ramp voltage supply using adiabatic charging principle. ISCAS (3) 2005: 2152-2155 | |
| 26 | Nang-Ching Yeung, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-fat Chan: Active RC filter with reduced capacitance by current division technique. ISCAS (4) 2005: 3279-3282 | |
| 25 | Chi-Leung San, Chiu-sing Choy, Pak-Kee Chan, Cheong-fat Chan, Kong-Pang Pun: Realization of card-centric framework: a card-centric computer [smart cards]. ISCAS (5) 2005: 4999-5002 | |
| 24 | Wei Han, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun: A speech recognizer with selectable model parameters. ISCAS (6) 2005: 5842-5845 | |
| 2004 | ||
| 23 | Chun-Pong Yu, Chiu-sing Choy, Hao Min, Cheong-fat Chan, Kong-Pang Pun: A low power asynchronous Java processor for contactless smart card. ASP-DAC 2004: 553-554 | |
| 22 | Pak-Kee Chan, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun: Card-Centric Framework - Providing I/O Resources for Smart Cards. CARDIS 2004: 225-240 | |
| 21 | Wang Tung Cheng, Kong-Pang Pun, Cheong-fat Chan, Chiu-sing Choy: An IF-sampling SC complex lowpass Sigma Delta modulator with high image rejection by capacitor sharing. ISCAS (1) 2004: 1140-1143 | |
| 20 | Wing-Kin Chan, Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun: An asynchronous SOVA decoder for wireless communication application. ISCAS (2) 2004: 517-520 | |
| 19 | Jing-ling Yang, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: Pipelines in Dynamic Dual-Rail Circuits. PATMOS 2004: 701-710 | |
| 18 | Jing-ling Yang, Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: A high-efficiency strongly self-checking asynchronous datapath. IEEE Trans. on CAD of Integrated Circuits and Systems 23(10): 1484-1494 (2004) | |
| 17 | Hongwei Wang, Cheong-fat Chan, Chiu-sing Choy: High Speed Curve Interpolating D/A Converter. VLSI Signal Processing 38(1): 5-11 (2004) | |
| 2003 | ||
| 16 | W. K. Yeung, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun: Clock recovery circuit with adiabatic technology (quasi-static CMOS logic). ISCAS (2) 2003: 185-187 | |
| 15 | Wei Han, Kwok-Wai Hon, Cheong-fat Chan, Tan Lee, Chiu-sing Choy, Kong-Pang Pun, Pak-Chung Ching: An HMM-based speech recognition IC. ISCAS (2) 2003: 744-747 | |
| 14 | Pak-Keung Leung, Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun: A low power asynchronous GF(2/sup 173/) ALU for elliptic curve crypto-processor. ISCAS (5) 2003: 337-340 | |
| 13 | Jing-ling Yang, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: Design for Self-Checking and Self-Timed Datapath. VTS 2003: 417-430 | |
| 2002 | ||
| 12 | Wang-Chi Cheng, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: A 900 MHz 1.2 V CMOS mixer with high linearity. APCCAS (1) 2002: 1-4 | |
| 11 | Jing-ling Yang, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: A Totally Self-Checking Dynamic Asynchronous Datapath. Asian Test Symposium 2002: 27-32 | |
| 10 | Kin-Pui Ho, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun: A CMOS current feedback operational amplifier with active current mode compensation. ISCAS (1) 2002: 709-712 | |
| 9 | Hongwei Wang, Cheong-fat Chan, Chiu-sing Choy: A 12-bit 80 Ms/s 110 mW floating analog-to-digital converter. ISCAS (3) 2002: 137-140 | |
| 8 | Kong-Pang Pun, Chiu-sing Choy, Cheong-fat Chan, José E. Franca: A quadrature IF mixer with high image rejection for continuous-time complex Sigma-Delta modulators. ISCAS (4) 2002: 221-224 | |
| 7 | Wang-Chi Cheng, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: A 1.2 V 900 MHz CMOS mixer. ISCAS (5) 2002: 365-368 | |
| 2001 | ||
| 6 | Pui-Lam Siu, Chiu-sing Choy, Jan Butas, Cheong-fat Chan: A low power asynchronous DES. ISCAS (4) 2001: 538-541 | |
| 5 | Lai-Kan Leung, Cheong-fat Chan, Oliver Chiu-sing Choy: A giga-hertz CMOS digital controlled oscillator. ISCAS (4) 2001: 610-613 | |
| 4 | Chi-Wai Lee, Chiu-sing Choy, Jan Butas, Cheong-fat Chan: A pipelined dataflow small micro-coded asynchronous processor and its application to DCT. ISCAS (4) 2001: 910-913 | |
| 3 | Oliver Chiu-sing Choy, Jan Butas, Juraj Povazanec, Cheong-fat Chan: A New Control Circuit for Asynchronous Micropipelines. IEEE Trans. Computers 50(9): 992-997 (2001) | |
| 1999 | ||
| 2 | Juraj Povazanec, Oliver Chiu-sing Choy, Cheong-fat Chan, Jan Butas, Yeu-qiu Zhang, Jing-ling Yang, Tin-yan Tang: Pipelined Dataflow Architecture of a Small Processor. PDPTA 1999: 1217-1223 | |
| 1998 | ||
| 1 | Oliver Chiu-sing Choy, Tin-chak Pang, Juraj Povazanec, Cheong-fat Chan: A Useful Micropipeline Architecture to Implement DSP Algorithms. EUROMICRO 1998: 10212- | |