Kai-Hui Chang

	2009
19		Hong-Zu Chou, I-Hui Lin, Ching-Sung Yang, Kai-Hui Chang, Sy-Yen Kuo: Enhancing bug hunting using high-level symbolic simulation. ACM Great Lakes Symposium on VLSI 2009: 417-420
18		Hong-Zu Chou, Kai-Hui Chang, Sy-Yen Kuo: Handling don't-care conditions in high-level synthesis and application for reducing initialized registers. DAC 2009: 412-415
17		Kai-Hui Chang, Valeria Bertacco, Igor L. Markov: Customizing IP cores for system-on-chip designs using extensive external don't-cares. DATE 2009: 582-585
16		Kai-Hui Chang, David A. Papa, Igor L. Markov, Valeria Bertacco: Incremental Verification with Error Detection, Diagnosis, and Visualization. IEEE Design & Test of Computers 26(2): 34-43 (2009)
	2008
15		Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Reap what you sow: spare cells for post-silicon metal fix. ISPD 2008: 103-110
14		Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Automating Postsilicon Debugging and Repair. IEEE Computer 41(7): 47-54 (2008)
13		Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Fixing Design Errors With Counterexamples and Resynthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 27(1): 184-188 (2008)
12		Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: SafeResynth: A new technique for physical synthesis. Integration 41(4): 544-556 (2008)
	2007
11		Stephen Plaza, Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Node Mergers in the Presence of Don't Cares. ASP-DAC 2007: 414-419
10		Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Safe Delay Optimization for Physical Synthesis. ASP-DAC 2007: 628-633
9		Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Fixing Design Errors with Counterexamples and Resynthesis. ASP-DAC 2007: 944-949
8		Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Automating post-silicon debugging and repair. ICCAD 2007: 91-98
7		Kai-Hui Chang, David A. Papa, Igor L. Markov, Valeria Bertacco: InVerS: An Incremental Verification System with Circuit Similarity Metrics and Error Visualization. ISQED 2007: 487-494
6		Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Postplacement rewiring by exhaustive search for functional symmetries. ACM Trans. Design Autom. Electr. Syst. 12(3): (2007)
5		Kai-Hui Chang, Valeria Bertacco, Igor L. Markov: Simulation-Based Bug Trace Minimization With BMC-Based Refinement. IEEE Trans. on CAD of Integrated Circuits and Systems 26(1): 152-165 (2007)
	2005
4		Kai-Hui Chang, Jeh-Yen Kang, Han-Wei Wang, Wei-Ting Tu, Yi-Jong Yeh, Sy-Yen Kuo: Automatic Partitioner for Behavior Level Distributed Logic Simulation. FORTE 2005: 525-528
3		Kai-Hui Chang, Valeria Bertacco, Igor L. Markov: Simulation-based bug trace minimization with BMC-based refinement. ICCAD 2005: 1045-1051
2		Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Post-placement rewiring and rebuffering by exhaustive search for functional symmetries. ICCAD 2005: 56-63
	2004
1		Kai-Hui Chang, Wei-Ting Tu, Yi-Jong Yeh, Sy-Yen Kuo: A Temporal Assertion Extension to Verilog. ATVA 2004: 499-504

Coauthor Index

1	Valeria Bertacco	[2] [3] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17]
2	Hong-Zu Chou	[18] [19]
3	Jeh-Yen Kang	[4]
4	Sy-Yen Kuo	[1] [4] [18] [19]
5	I-Hui Lin	[19]
6	Igor L. Markov	[2] [3] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17]
7	David A. Papa	[7] [16]
8	Stephen Plaza	[11]
9	Wei-Ting Tu	[1] [4]
10	Han-Wei Wang	[4]
11	Ching-Sung Yang	[19]
12	Yi-Jong Yeh	[1] [4]

Colors in the list of coauthors