 | 2006 |
|---|
| 6 |       | Shih-Hao Ou,
Tay-Jyi Lin,
Chao-Wei Huang,
Yu-Ting Kuo,
Chie-Min Chao,
Chih-Wei Liu,
Chein-Wei Jen:
A 52mW 1200MIPS compact DSP for multi-core media SoC.
ASP-DAC 2006: 118-119 |
| 5 | | Tay-Jyi Lin,
Hung-Yueh Lin,
Chie-Min Chao,
Chih-Wei Liu,
Chih-Wei Jen:
A Compact DSP Core with Static Floating-Point Arithmetic.
VLSI Signal Processing 42(2): 127-138 (2006) |
| 2005 |
|---|
| 4 | | Tay-Jyi Lin,
Chie-Min Chao,
Chia-Hsien Liu,
Pi-Chen Hsiao,
Shin-Kai Chen,
Li-Chun Lin,
Chih-Wei Liu,
Chein-Wei Jen:
A unified processor architecture for RISC & VLIW DSP.
ACM Great Lakes Symposium on VLSI 2005: 50-55 |
| 3 | | Chia-Hsien Liu,
Tay-Jyi Lin,
Chie-Min Chao,
Pi-Chen Hsiao,
Li-Chun Lin,
Shin-Kai Chen,
Chao-Wei Huang,
Chih-Wei Liu,
Chein-Wei Jen:
Hierarchical instruction encoding for VLIW digital signal processors.
ISCAS (4) 2005: 3503-3506 |
| 2004 |
|---|
| 2 | | Tay-Jyi Lin,
Hung-Yueh Lin,
Chie-Min Chao,
Chih-Wei Liu,
Chein-Wei Jen:
A compact DSP core with static floating-point unit & its microcode generation.
ACM Great Lakes Symposium on VLSI 2004: 57-60 |
| 1 |  | Hung-Yueh Lin,
Tay-Jyi Lin,
Chie-Min Chao,
Yen-Chin Liao,
Chih-Wei Liu,
Chein-Wei Jen:
Static floating-point unit with implicit exponent tracking for embedded DSP.
ISCAS (2) 2004: 821-824 |
