 | 2001 |
|---|
| 5 |       | Ming-Dou Ker,
Tung-Yang Chen,
Chung-Yu Win:
ESD protection design in a 0.18-um salicide CMOS technology by using substrate-triggered technique.
ISCAS (4) 2001: 754-757 |
| 4 | | Ming-Dou Ker,
Tung-Yang Chen:
Design on the turn-on efficient power-rail ESD clamp circuit with stacked polysilicon diodes.
ISCAS (4) 2001: 758-761 |
| 3 | | Tung-Yang Chen,
Ming-Dou Ker:
Design on ESD Protection Circuit with Very Low and Constant Input Capacitance.
ISQED 2001: 247-248 |
| 2 | | Ming-Dou Ker,
Wen-Yu Lo,
Tung-Yang Chen,
Howard Tang,
S.-S. Chen,
M.-C. Wang:
Compact Layout Rule Extraction for Latchup Prevention in a 0.25-?m Shallow-Trench-Isolation Silicided Bulk CMOS Process.
ISQED 2001: 267-272 |
| 1999 |
|---|
| 1 | | Ming-Dou Ker,
Hun-Hsien Chang,
Tung-Yang Chen:
ESD buses for whole-chip ESD protection.
ISCAS (1) 1999: 545-548 |
