 | 2008 |
|---|
| 9 |       | Hsin-Chou Chi,
Chia-Ming Wu,
Jun-Hui Lee:
Integrated Mapping and Scheduling for Circuit-Switched Network-on-Chip Architectures.
DELTA 2008: 415-420 |
| 2006 |
|---|
| 8 |  | Hsin-Chou Chi,
Chia-Ming Wu,
Sung-Tze Wu:
A Switch Supporting Circuit and Packet Switching for On-Chip Networks.
DDECS 2006: 226-227 |
| 7 | | Hsin-Chou Chi,
Chia-Ming Wu:
An Efficient Scheduler for Circuit-Switched Network-on-Chip Architectures.
VLSI-SoC 2006: 68-73 |
| 2005 |
|---|
| 6 | | Hsin-Chou Chi,
Chia-Ming Wu:
Efficient Switches for Network-on-Chip Based Embedded Systems.
EUC 2005: 67-76 |
| 2003 |
|---|
| 5 | | Hsin-Chou Chi,
Wen-Jen Wu:
Routing Tree Construction for Interconnection Network with Irregular Topologies.
PDP 2003: 157-164 |
| 1997 |
|---|
| 4 | | Hsin-Chou Chi,
Chih-Tsung Tang:
A Deadlock-Free Routing Scheme for Interconnection Networks with Irregular Topologies.
ICPADS 1997: 88-95 |
| 1994 |
|---|
| 3 | | Hsin-Chou Chi,
Yuval Tamir:
Starvation Prevention for Arbiters of Crossbars with Multi-Queue Input Buffers.
COMPCON 1994: 292-297 |
| 1993 |
|---|
| 2 | | Yuval Tamir,
Hsin-Chou Chi:
Symmetric Crossbar Arbiters for VLSI Communication Switches.
IEEE Trans. Parallel Distrib. Syst. 4(1): 13-27 (1993) |
| 1991 |
|---|
| 1 | | Hsin-Chou Chi,
Yuval Tamir:
Decomposed Arbiters for Large Crossbars with Multi-Queue Input Buffers.
ICCD 1991: 233-238 |
