 | 2009 |
|---|
| 4 |       | Li Li,
Ken Choi,
Seongmo Park,
MooKyung Chung:
Selective clock gating by using wasting toggle rate.
EIT 2009: 399-404 |
| 3 | | Feng Ge,
P. Jain,
Ken Choi:
Ultra-low power and high speed design and implementation of AES and SHA1 hardware cores in 65 nanometer CMOS technology.
EIT 2009: 405-410 |
| 2 | | Nam Sung Kim,
Jun Seomun,
Abhishek A. Sinkar,
Jungseob Lee,
Tae Hee Han,
Ken Choi,
Youngsoo Shin:
Frequency and yield optimization using power gates in power-constrained designs.
ISLPED 2009: 121-126 |
| 2008 |
|---|
| 1 | | Jerry Frenkil,
Ken Choi,
Kimiyoshi Usami:
Power Gating for Ultra-low Leakage: Physics, Design, and Analysis.
DATE 2008 |
