| 2006 | ||
|---|---|---|
| 2 | EE | Jike Chong, Chidamber Kulkarni, Gordon J. Brebner: Building a flexible and scalable DRAM interface for networking applications on FPGAs. FPGA 2006: 233 |
| 2005 | ||
| 1 | EE | Wei Zheng, Jike Chong, Claudio Pinello, Sri Kanajan, Alberto L. Sangiovanni-Vincentelli: Extensible and Scalable Time Triggered Scheduling. ACSD 2005: 132-141 |
| 1 | Gordon J. Brebner | [2] |
| 2 | Sri Kanajan | [1] |
| 3 | Chidamber Kulkarni | [2] |
| 4 | Claudio Pinello | [1] |
| 5 | Alberto L. Sangiovanni-Vincentelli | [1] |
| 6 | Wei Zheng | [1] |