 | 2009 |
|---|
| 10 |       | Mihir R. Choudhury,
Kartik Mohanram:
Timing-driven optimization using lookahead logic circuits.
DAC 2009: 390-395 |
| 9 | | Mihir R. Choudhury,
Kartik Mohanram:
Masking timing errors on speed-paths in logic circuits.
DATE 2009: 87-92 |
| 8 | | Mihir R. Choudhury,
Kartik Mohanram:
Reliability Analysis of Logic Circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 28(3): 392-405 (2009) |
| 2008 |
|---|
| 7 | | Mihir R. Choudhury,
Youngki Yoon,
Jing Guo,
Kartik Mohanram:
Technology exploration for graphene nanoribbon FETs.
DAC 2008: 272-277 |
| 6 | | Mihir R. Choudhury,
Kartik Mohanram:
Approximate logic circuits for low overhead, non-intrusive concurrent error detection.
DATE 2008: 903-908 |
| 2007 |
|---|
| 5 | | Mihir R. Choudhury,
Kyle Ringgenberg,
Scott Rixner,
Kartik Mohanram:
Interactive presentation: Single-ended coding techniques for off-chip interconnects to commodity memory.
DATE 2007: 1072-1077 |
| 4 | | Mihir R. Choudhury,
Kartik Mohanram:
Accurate and scalable reliability analysis of logic circuits.
DATE 2007: 1454-1459 |
| 2006 |
|---|
| 3 | | Mihir R. Choudhury,
Quming Zhou,
Kartik Mohanram:
Design optimization for single-event upset robustness using simultaneous dual-VDD and sizing techniques.
ICCAD 2006: 204-209 |
| 2 | | Quming Zhou,
Mihir R. Choudhury,
Kartik Mohanram:
Design Optimization for Robustness to Single Event Upsets.
VTS 2006: 202-207 |
| 2005 |
|---|
| 1 | | Saurabh Goyal,
Mihir R. Choudhury,
S. S. S. P. Rao,
L. Kalyan Kumar:
Multiple Fault Testing of Logic Resources of SRAM-Based FPGAs.
VLSI Design 2005: 742-747 |
