 | 2008 |
|---|
| 9 |       | Claudio Mucci,
Luca Vanzolini,
Ilario Mirimin,
Daniele Gazzola,
Antonio Deledda,
Sebastian Goller,
Joachim Knäblein,
Axel Schneider,
Luca Ciccarelli,
Fabio Campi:
Implementation of Parallel LFSR-based Applications on an Adaptive DSP featuring a Pipelined Configurable Gate Array.
DATE 2008: 1444-1449 |
| 8 | | Fabio Campi,
Luca Ciccarelli,
Claudio Mucci:
Sustainable (re-) configurable solutions for the high volume SoC market.
IPDPS 2008: 1-8 |
| 2007 |
|---|
| 7 | | Fabio Campi,
Antonio Deledda,
Matteo Pizzotti,
Luca Ciccarelli,
Pier Luigi Rolandi,
Claudio Mucci,
Andrea Lodi,
Arseni Vitkovski,
Luca Vanzolini:
A dynamically adaptive DSP for heterogeneous reconfigurable platforms.
DATE 2007: 9-14 |
| 2006 |
|---|
| 6 | | Andrea Lodi,
Claudio Mucci,
Massimo Bocchi,
Andrea Cappelli,
Mario de Dominicis,
Luca Ciccarelli:
A Multi-Context Pipelined Array for Embedded Systems.
FPL 2006: 1-8 |
| 2005 |
|---|
| 5 | | Andrea Lodi,
Luca Ciccarelli,
Claudio Mucci,
Roberto Giansante,
Andrea Cappelli,
Mario Toma:
An Embedded Reconfigurable Datapath for SoC.
FCCM 2005: 303-304 |
| 4 | | Andrea Lodi,
Luca Ciccarelli,
Roberto Giansante:
Combining low-leakage techniques for FPGA routing design.
FPGA 2005: 208-214 |
| 2004 |
|---|
| 3 | | Andrea Lodi,
Roberto Giansante,
Carlo Chiesa,
Luca Ciccarelli,
Mario Toma,
Fabio Campi:
Routing architecture for multi-context FPGAs.
FPGA 2004: 246 |
| 2 | | Andrea Lodi,
Roberto Giansante,
Carlo Chiesa,
Luca Ciccarelli,
Fabio Campi,
Mario Toma:
Compact Buffered Routing Architecture.
FPL 2004: 179-188 |
| 2003 |
|---|
| 1 | | Andrea Lodi,
Luca Ciccarelli,
Andrea Cappelli,
Fabio Campi,
Mario Toma:
Decoder-Based Multi-Context Interconnect Architecture.
ISVLSI 2003: 231-233 |
