Thomas M. Conte

	2009
62		Balaji V. Iyer, Thomas M. Conte: On power and energy trends of IEEE 802.11n PHY. MSWiM 2009: 353-356
	2008
61		Balaji V. Iyer, Thomas M. Conte: A Power Model for Register-Sharing Structures. DIPES 2008: 131-142
60		Balaji V. Iyer, Jason A. Poovey, Thomas M. Conte: Energy-aware opcode design. ICCD 2008: 570-576
	2007
59		Thomas M. Conte: Keynote: Insight, Not (Random) Numbers: An Embedded Perspective. HiPEAC 2007: 3
58		Paul D. Bryan, Thomas M. Conte: Combining cluster sampling with single pass methods for efficient sampling regimen design. ICCD 2007: 472-479
57		Paul D. Bryan, Michel C. Rosier, Thomas M. Conte: Reverse State Reconstruction for Sampled Microarchitectural Simulation. ISPASS 2007: 190-199
	2005
56		Thomas M. Conte, Paolo Faraboschi, William H. Mangione-Smith, Walid A. Najjar: Proceedings of the 2005 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2005, San Francisco, California, USA, September 24-27, 2005 ACM 2005
55		Thomas M. Conte, Nacho Navarro, Wen-mei W. Hwu, Mateo Valero, Theo Ungerer: High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings Springer 2005
54		Thomas M. Conte: Insight, not (random) numbers. ISPASS 2005: 101
53		Huiyang Zhou, Thomas M. Conte: Enhancing Memory-Level Parallelism via Recovery-Free Value Prediction. IEEE Trans. Computers 54(7): 897-912 (2005)
52		Emre Özer, Thomas M. Conte: High-Performance and Low-Cost Dual-Thread VLIW Processor Using Weld Architecture Paradigm. IEEE Trans. Parallel Distrib. Syst. 16(12): 1132-1142 (2005)
51		Monther Aldwairi, Thomas M. Conte, Paul D. Franzon: Configurable string matching hardware for speeding up intrusion detection. SIGARCH Computer Architecture News 33(1): 99-107 (2005)
50		Saurabh Sharma, Jesse G. Beu, Thomas M. Conte: Spectral prefetcher: An effective mechanism for L2 cache prefetching. TACO 2(4): 423-450 (2005)
	2004
49		Alessio Bechini, Thomas M. Conte, Cosimo Antonio Prete: Guest Editors' Introduction: Opportunities and Challenges in Embedded Systems. IEEE Micro 24(4): 8-9 (2004)
	2003
48		Jaime H. Moreno, Praveen K. Murthy, Thomas M. Conte, Paolo Faraboschi: Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES 2003, San Jose, California, USA, October 30 - November 1, 2003 ACM 2003
47		Huiyang Zhou, Thomas M. Conte: Enhancing memory level parallelism via recovery-free value prediction. ICS 2003: 326-335
46		Huiyang Zhou, Jill Flanagan, Thomas M. Conte: Detecting Global Stride Locality in Value Streams. ISCA 2003: 324-335
45		Huiyang Zhou, Mark C. Toburen, Eric Rotenberg, Thomas M. Conte: Adaptive mode control: A static-power-efficient cache design. ACM Trans. Embedded Comput. Syst. 2(3): 347-372 (2003)
44		Chao-ying Fu, Jill T. Bodine, Thomas M. Conte: Modeling Value Speculation: An Optimal Edge Selection Problem. IEEE Trans. Computers 52(3): 277-292 (2003)
	2002
43		Huiyang Zhou, Thomas M. Conte: Code Size Efficiency in Global Scheduling for ILP Processors. Interaction between Compilers and Computer Architectures 2002: 79-90
42		Thomas M. Conte: Choosing the Brain(s) of an Embedded System. IEEE Computer 35(7): 106-107 (2002)
	2001
41		Emre Özer, Thomas M. Conte, Saurabh Sharma: Weld: A Multithreading Technique Towards Latency-Tolerant VLIW Processors. HiPC 2001: 192-203
40		Huiyang Zhou, Mark C. Toburen, Eric Rotenberg, Thomas M. Conte: Adaptive Mode Control: A Static-Power-Efficient Cache Design. IEEE PACT 2001: 61-
39		Huiyang Zhou, Matthew D. Jennings, Thomas M. Conte: Tree Traversal Scheduling: A Global Instruction Scheduling Technique for VLIW/EPIC Processors. LCPC 2001: 223-238
	2000
38		Kim M. Hazelwood, Thomas M. Conte: A Lightweight Algorithm for Dynamic If-Conversion during Dynamic Optimization. IEEE PACT 2000: 71-80
37		Thomas M. Conte, Sumedh W. Sathaye: Properties of Rescheduling Size Invariance for Dynamic Rescheduling-Based VLIW Cross-Generation Compatibility. IEEE Trans. Computers 49(8): 814-825 (2000)
36		Thomas M. Conte, Kishore N. Menezes, Sumedh W. Sathaye, Mark C. Toburen: System-level power consumption modeling and tradeoff analysis techniques for superscalar processor design. IEEE Trans. VLSI Syst. 8(2): 129-137 (2000)
	1999
35		Mouna Nakkar, David G. Bentlage, John Harding, David Schwartz, Paul D. Franzon, Thomas M. Conte: Dynamically Programmable Cache Evaluation and Virtualization. FPGA 1999: 246
34		Sergei Y. Larin, Thomas M. Conte: Compiler-Driven Cached Code Compression Schemes for Embedded ILP Processors. MICRO 1999: 82-92
33		Thomas M. Conte, Wen-mei W. Hwu, Mark Smotherman: Editor's Introduction. International Journal of Parallel Programming 27(5): 325-326 (1999)
32		Thomas M. Conte, Wen-mei W. Hwu, Mark Smotherman: Editors' Introduction. International Journal of Parallel Programming 27(6): 425-426 (1999)
	1998
31		Chao-ying Fu, Matthew D. Jennings, Sergei Y. Larin, Thomas M. Conte: Value Speculation Scheduling for High Performance Processors. ASPLOS 1998: 262-271
30		William A. Havanki, Sanjeev Banerjia, Thomas M. Conte: Treegion Scheduling for Wide Issue Processors. HPCA 1998: 266-276
29		Emre Özer, Sumedh W. Sathaye, Kishore N. Menezes, Sanjeev Banerjia, Matthew D. Jennings, Thomas M. Conte: A Fast Interrupt Handling Scheme for VLIW Processors. IEEE PACT 1998: 136-141
28		Emre Özer, Sanjeev Banerjia, Thomas M. Conte: Unified Assign and Schedule: A New Approach to Scheduling for Clustered Register File Microarchitectures. MICRO 1998: 308-315
27		Pradip Bose, Thomas M. Conte: Performance Analysis and Its Impact on Design. IEEE Computer 31(5): 41-49 (1998)
26		Sanjeev Banerjia, Sumedh W. Sathaye, Kishore N. Menezes, Thomas M. Conte: MPS: Miss-Path Scheduling for Multiple-Issue Processors. IEEE Trans. Computers 47(12): 1382-1397 (1998)
25		Thomas M. Conte, Mary Ann Hirsch, Wen-mei W. Hwu: Combining Trace Sampling with Single Pass Methods for Efficient Cache Simulation. IEEE Trans. Computers 47(6): 714-720 (1998)
	1997
24		Sanjeev Banerjia, William A. Havanki, Thomas M. Conte: Treegion Scheduling for Highly Parallel Processors. Euro-Par 1997: 1074-1078
23		Thomas M. Conte, Andrew Wolfe: Combining General-Purpose and Multimedia in One Package: Challenges and Opportunities. HICSS (1) 1997: 708-712
22		Kishore N. Menezes, Sumedh W. Sathaye, Thomas M. Conte: Path Prediction for High Issue-Rate Processors. IEEE PACT 1997: 178-188
21		Thomas M. Conte, Pradeep K. Dubey, Matthew D. Jennings, Ruby B. Lee, Alex Peleg, Salliah Rathnam, Michael S. Schlansker, Peter Song, Andrew Wolfe: Challenges to Combining General-Purpose and Multimedia Processors. IEEE Computer 30(12): 33-37 (1997)
20		Michael S. Schlansker, Thomas M. Conte, James C. Dehnert, Kemal Ebcioglu, Jesse Zhixi Fang, Carol L. Thompson: Compilers for Instruction-Level Parallelism. IEEE Computer 30(12): 63-69 (1997)
	1996
19		Thomas M. Conte, Mary Ann Hirsch, Kishore N. Menezes: Reducing State Loss For Effective Trace Sampling of Superscalar Processors. ICCD 1996: 468-477
18		Thomas M. Conte, Sanjeev Banerjia, Sergei Y. Larin, Kishore N. Menezes, Sumedh W. Sathaye: Instruction Fetch Mechanisms for VLIW Architectures with Compressed Encodings. MICRO 1996: 201-211
17		Thomas M. Conte, Kishore N. Menezes, Mary Ann Hirsch: Accurate and Practical Profile-driven Compilation Using the Profile Buffer. MICRO 1996: 36-45
16		Thomas M. Conte, Sumedh W. Sathaye, Sanjeev Banerjia: A Persistent Rescheduled-page Cache for Low Overhead Object Code Compatibility in VLIW Architectures. MICRO 1996: 4-13
15		Thomas M. Conte: Importance of Profiling and Compatibility. ACM Comput. Surv. 28(4es): 26 (1996)
	1995
14		J. Stan Cox, David P. Howell, Thomas M. Conte: Commercializing profile-driven optimization. HICSS (1) 1995: 221-228
13		Thomas M. Conte, Kishore N. Menezes, Sumedh W. Sathaye: A technique to determine power-efficient, high-performance superscalar processors. HICSS (1) 1995: 324-333
12		Thomas M. Conte, Kishore N. Menezes, Patrick M. Mills, Burzin A. Patel: Optimization of Instruction Fetch Mechanisms for High Issue Rates. ISCA 1995: 333-344
11		Thomas M. Conte, Sumedh W. Sathaye: Dynamic rescheduling: a technique for object code compatibility in VLIW architectures. MICRO 1995: 208-218
10		Thomas M. Conte, Wen-mei W. Hwu: Advances in Benchmarking Techniques: New Standards and Quantitative Metrics. Advances in Computers 41: 231-253 (1995)
	1994
9		Thomas M. Conte, Charles E. Gimarc: Fast Simulation of Computer Architectures: Introduction. HICSS (1) 1994: 184
8		Thomas M. Conte, Burzin A. Patel, J. Stan Cox: Using branch handling hardware to support profile-driven optimization. MICRO 1994: 12-21
7		Wen-mei W. Hwu, Thomas M. Conte: The Susceptibility of Programs to Context Switching. IEEE Trans. Computers 43(9): 994-1003 (1994)
	1993
6		Thomas M. Conte, William H. Mangione-Smith: Determining Cost-Effective Multiple Issue Processor Designs. ICCD 1993: 94-101
5		William Y. Chen, Pohua P. Chang, Thomas M. Conte, Wen-mei W. Hwu: The Effect of Code Expanding Optimizations on Instruction Cache Design. IEEE Trans. Computers 42(9): 1045-1057 (1993)
	1992
4		Thomas M. Conte: Tradeoffs in processor/memory interfaces for superscalar processors. MICRO 1992: 202-205
	1991
3		Thomas M. Conte, Wen-mei W. Hwu: Benchmark Characterization. IEEE Computer 24(1): 48-56 (1991)
	1989
2		Wen-mei W. Hwu, Thomas M. Conte, Pohua P. Chang: Comparing Software and Hardware Schemes For Reducing the Cost of Branches. ISCA 1989: 224-233
1		Wen-mei W. Hwu, Thomas M. Conte: A Simulation Study of Simultaneous Vector Prefetch Performance in Multiprocessor Memory Subsystems (Extended Abstract). SIGMETRICS 1989: 227

Coauthor Index

1	Monther Aldwairi	[51]
2	Sanjeev Banerjia	[16] [18] [24] [26] [28] [29] [30]
3	Alessio Bechini	[49]
4	David G. Bentlage	[35]
5	Jesse G. Beu	[50]
6	Jill T. Bodine	[44]
7	Pradip Bose	[27]
8	Paul D. Bryan	[57] [58]
9	Pohua P. Chang	[2] [5]
10	William Y. Chen	[5]
11	J. Stan Cox	[8] [14]
12	James C. Dehnert	[20]
13	Pradeep K. Dubey	[21]
14	Kemal Ebcioglu	[20]
15	Jesse Zhixi Fang	[20]
16	Paolo Faraboschi	[48] [56]
17	Jill Flanagan	[46]
18	Paul D. Franzon	[35] [51]
19	Chao-ying Fu	[31] [44]
20	Charles E. Gimarc	[9]
21	John Harding	[35]
22	William A. Havanki	[24] [30]
23	Kim M. Hazelwood	[38]
24	Mary Ann Hirsch	[17] [19] [25]
25	David P. Howell	[14]
26	Wen-mei W. Hwu	[1] [2] [3] [5] [7] [10] [25] [32] [33] [55]
27	Balaji V. Iyer	[60] [61] [62]
28	Matthew D. Jennings	[21] [29] [31] [39]
29	Sergei Y. Larin	[18] [31] [34]
30	Ruby B. Lee	[21]
31	William H. Mangione-Smith	[6] [56]
32	Kishore N. Menezes	[12] [13] [17] [18] [19] [22] [26] [29] [36]
33	Patrick M. Mills	[12]
34	Jaime H. Moreno	[48]
35	Praveen K. Murthy	[48]
36	Walid A. Najjar	[56]
37	Mouna Nakkar	[35]
38	Nacho Navarro	[55]
39	Emre Özer	[28] [29] [41] [52]
40	Burzin A. Patel	[8] [12]
41	Alex Peleg	[21]
42	Jason A. Poovey	[60]
43	Cosimo Antonio Prete	[49]
44	Salliah Rathnam	[21]
45	Michel C. Rosier	[57]
46	Eric Rotenberg	[40] [45]
47	Sumedh W. Sathaye	[11] [13] [16] [18] [22] [26] [29] [36] [37]
48	Michael S. Schlansker	[20] [21]
49	David Schwartz	[35]
50	Saurabh Sharma	[41] [50]
51	Mark Smotherman	[32] [33]
52	Peter Song	[21]
53	Carol L. Thompson	[20]
54	Mark C. Toburen	[36] [40] [45]
55	Theo Ungerer	[55]
56	Mateo Valero	[55]
57	Andrew Wolfe	[21] [23]
58	Huiyang Zhou	[39] [40] [43] [45] [46] [47] [53]

Colors in the list of coauthors