戴葵
List of publications from the DBLP Bibliography Server - FAQ
| 2008 | ||
|---|---|---|
| 37 | EE | Xin-biao Gan, Kui Dai, Libo Huang, Li Shen, Zhiying Wang: A New CORDIC Algorithm and Software Implementation Based on Synchronized Data Triggering Architecture. MUE 2008: 83-86 |
| 36 | EE | Jianjun Guo, Ming-che Lai, Zhengyuan Pang, Libo Huang, Fangyuan Chen, Kui Dai, Zhiying Wang: Hierarchical memory system design for a heterogeneous multi-core processor. SAC 2008: 1504-1508 |
| 2007 | ||
| 35 | EE | Gang Jin, Lei Wang, Zhiying Wang, Kui Dai: An Optimal Design Method for De-synchronous Circuit Based on Control Graph. APPT 2007: 70-79 |
| 34 | EE | Yong Li, Zhiying Wang, Xue-mi Zhao, Jian Ruan, Kui Dai: Design of a Low-Power Embedded Processor Architecture Using Asynchronous Function Units. Asia-Pacific Computer Systems Architecture Conference 2007: 354-363 |
| 33 | EE | Yong Li, Zhiying Wang, Kui Dai: A Low-Power Application Specific Instruction Set Processor Using Asynchronous Function Units. CIT 2007: 817-822 |
| 32 | EE | Yong Li, Zhiying Wang, Jian Ruan, Kui Dai: A Low-Power Globally Synchronous Locally Asynchronous FFT Processor. HPCC 2007: 168-179 |
| 31 | EE | Libo Huang, Li Shen, Kui Dai, Zhiying Wang: A New Architecture For Multiple-Precision Floating-Point Multiply-Add Fused Unit Design. IEEE Symposium on Computer Arithmetic 2007: 69-76 |
| 30 | EE | Jian Ruan, Zhiying Wang, Kui Dai, Yong Li: Latency Estimation of the Asynchronous Pipeline Using the Max-Plus Algebra. International Conference on Computational Science (4) 2007: 251-258 |
| 29 | EE | Libo Huang, Ming-che Lai, Kui Dai, Hong Yue, Li Shen: Hardware Support for Arithmetic Units of Processor with Multimedia Extension. MUE 2007: 633-637 |
| 28 | EE | Jian Ruan, Zhiying Wang, Kui Dai, Yong Li: Design and Test of Self-checking Asynchronous Control Circuit. PATMOS 2007: 320-329 |
| 2006 | ||
| 27 | EE | Jianjun Guo, Kui Dai, Zhiying Wang: A Heterogeneous Multi-core Processor Architecture for High Performance Computing. Asia-Pacific Computer Systems Architecture Conference 2006: 359-365 |
| 26 | EE | Lei Wang, Zhiying Wang, Kui Dai: Cycle Period Analysis and Optimization of Timed Circuits. Asia-Pacific Computer Systems Architecture Conference 2006: 502-508 |
| 25 | EE | Wei Chen, Rui Gong, Kui Dai, Fang Liu, Zhiying Wang: Two New Space-Time Triple Modular Redundancy Techniques for Improving Fault Tolerance of Computer Systems. CIT 2006: 175 |
| 24 | EE | Lei Wang, Zhiying Wang, Kui Dai: An Approximate Method for Performance Evaluation of Asynchronous Pipeline Rings. CIT 2006: 244 |
| 23 | Hong Yue, Kui Dai, Zhiying Wang: A Dual-core Embedded System-on-Chip Architecture for Multimedia Signal Processing Applications. ESA 2006: 100-104 | |
| 22 | Wei Chen, Rui Gong, Fang Liu, Kui Dai, Zhiying Wang: Improving the Fault Tolerance of a Computer System with Space-Time Triple Modular Redundancy. ESA 2006: 183-190 | |
| 21 | EE | Jianjun Guo, Kui Dai, Zhiying Wang: A High Performance Heterogeneous Architecture and Its Optimization Design. HPCC 2006: 300-309 |
| 20 | EE | Hong Yue, Zhiying Wang, Kui Dai: A Heterogeneous Embedded MPSoC for Multimedia Applications. HPCC 2006: 591-600 |
| 19 | EE | Jing-Xin Wang, Zhiying Wang, Kui Dai: Intrusion Alert Analysis Based on PCA and the LVQ Neural Network. ICONIP (3) 2006: 217-224 |
| 18 | EE | Jing-Xin Wang, Zhiying Wang, Kui Dai: A PCA-LVQ Model for Intrusion Alert Analysis. ISI 2006: 715-716 |
| 17 | EE | Fangyong Hou, Hongjun He, Zhiying Wang, Kui Dai: An Efficient Way to Build Secure Disk. ISPEC 2006: 290-301 |
| 16 | EE | Yuan-man Tong, Zhiying Wang, Kui Dai, Hongyi Lu: Designing Power Analysis Resistant and High Performance Block Cipher Coprocessor Using WDDL and Wave-Pipelining. Inscrypt 2006: 66-77 |
| 15 | EE | Xue-mi Zhao, Zhiying Wang, Hongyi Lu, Kui Dai: A 6.35Mbps 1024-bit RSA crypto coprocessor in a 0.18um CMOS technology. VLSI-SoC 2006: 216-221 |
| 14 | EE | Yong Li, Lei Wang, Rui Gong, Kui Dai, Zhiying Wang: Research and Implementation of a 32-Bit Asynchronous Multiplier. Journal of Computer Research and Development 43(12): 2152-2157 (2006) |
| 2005 | ||
| 13 | EE | Jianjun Guo, Kui Dai, Yun Cheng, Zhiying Wang: Research on Fast Block Participation Mode Selection Algorithm in H.264. ACIS-ICIS 2005: 111-113 |
| 12 | EE | Yun Cheng, Kui Dai, Zhiying Wang, Jianjun Guo: A Fast Motion Estimation Algorithm Based on Diamond and Simplified Square Search Patterns. CIARP 2005: 440-449 |
| 11 | EE | Dan Wu, Zhiying Wang, Kui Dai: Retargetable Machine-Description System: Multi-layer Architecture Approach. GCC 2005: 1161-1166 |
| 10 | EE | Fang Liu, Kui Dai, Zhiying Wang, Jun Ma: Research on Fuzzy Group Decision Making in Security Risk Assessment. ICN (2) 2005: 1114-1121 |
| 9 | EE | Hong Yue, Ming-che Lai, Kui Dai, Zhiying Wang: Design of a Configurable Embedded Processor Architecture for DSP Functions. ICPADS (2) 2005: 27-31 |
| 8 | EE | Fangyong Hou, Zhiying Wang, Kui Dai, Yun Liu: Protecting Mass Data Basing on Small Trusted Agent. ISPEC 2005: 362-373 |
| 7 | EE | Yun Cheng, Zhiying Wang, Kui Dai, Jianjun Guo: A Fast Motion Estimation Algorithm Based on Diamond and Triangle Search Patterns. IbPRIA (1) 2005: 419-426 |
| 6 | EE | Jiang-chun Ren, Kui Dai, Zhiying Wang: Trust-Enhanced Alteration Scenario for Universal Computer. PRDC 2005: 275-280 |
| 5 | EE | Fang Liu, Yong Chen, Kui Dai, Zhiying Wang, Zhiping Cai: Research on Risk Probability Estimating Using Fuzzy Clustering for Dynamic Security Assessment. RSFDGrC (2) 2005: 539-547 |
| 4 | Jiang-chun Ren, Kui Dai, Zhiying Wang, Xue-mi Zhao, Yuan-man Tong: Design and Implementation a TPM Chip SUP320 by SOC. SEC 2005: 143-154 | |
| 2004 | ||
| 3 | EE | Fang Liu, Kui Dai, Zhiying Wang: Improving Security Architecture Development Based on Multiple Criteria Decision Making. AWCC 2004: 214-218 |
| 2 | EE | Lei Wang, Hongyi Lu, Kui Dai, Zhiying Wang: TengYue-1TengYue: In Chinese means jump over.: A High Performance Embedded SoC. Asia-Pacific Computer Systems Architecture Conference 2004: 126-136 |
| 1 | EE | Ming-che Lai, Kui Dai, Li Shen, Zhiying Wang: A New Technique for Program Code Compression in Embedded Microprocessor. ICESS 2004: 158-164 |
| 1 | Zhiping Cai | [5] |
| 2 | Fangyuan Chen | [36] |
| 3 | Wei Chen | [22] [25] |
| 4 | Yong Chen | [5] |
| 5 | Yun Cheng | [7] [12] [13] |
| 6 | Xin-biao Gan | [37] |
| 7 | Rui Gong | [14] [22] [25] |
| 8 | Jianjun Guo | [7] [12] [13] [21] [27] [36] |
| 9 | Hongjun He | [17] |
| 10 | Fangyong Hou | [8] [17] |
| 11 | Libo Huang | [29] [31] [36] [37] |
| 12 | Gang Jin | [35] |
| 13 | Ming-che Lai | [1] [9] [29] [36] |
| 14 | Yong Li | [14] [28] [30] [32] [33] [34] |
| 15 | Fang Liu | [3] [5] [10] [22] [25] |
| 16 | Yun Liu | [8] |
| 17 | Hongyi Lu | [2] [15] [16] |
| 18 | Jun Ma | [10] |
| 19 | Zhengyuan Pang | [36] |
| 20 | Jiang-chun Ren | [4] [6] |
| 21 | Jian Ruan | [28] [30] [32] [34] |
| 22 | Li Shen | [1] [29] [31] [37] |
| 23 | Yuan-man Tong | [4] [16] |
| 24 | Jing-Xin Wang | [18] [19] |
| 25 | Lei Wang | [2] [14] [24] [26] [35] |
| 26 | Zhiying Wang | [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28] [30] [31] [32] [33] [34] [35] [36] [37] |
| 27 | Dan Wu | [11] |
| 28 | Hong Yue | [9] [20] [23] [29] |
| 29 | Xue-mi Zhao | [4] [15] [34] |