 | 2000 |
|---|
| 8 |       | Debaleena Das,
Nur A. Touba,
Markus Seuring,
Michael Gössel:
Low Cost Concurrent Error Detection Based on Modulo Weight-Based Codes.
IOLTW 2000: 171- |
| 7 |  | Debaleena Das,
Nur A. Touba:
Reducing test data volume using external/LBIST hybrid test patterns.
ITC 2000: 115-122 |
| 1999 |
|---|
| 6 | | Jayabrata Ghosh-Dastidar,
Debaleena Das,
Nur A. Touba:
Fault diagnosis in scan-based BIST using both time and space information.
ITC 1999: 95-102 |
| 5 | | Debaleena Das,
Nur A. Touba:
A Low Cost Approach for Detecting, Locating, and Avoiding Interconnect Faults in FPGA-Based Reconfigurable Systems.
VLSI Design 1999: 266-269 |
| 4 | | Debaleena Das,
Nur A. Touba:
Weight-Based Codes and Their Application to Concurrent Error Detection of Multilevel Circuits.
VTS 1999: 370-377 |
| 3 | | Debaleena Das,
Nur A. Touba:
Synthesis of Circuits with Low-Cost Concurrent Error Detection Based on Bose-Lin Codes.
J. Electronic Testing 15(1-2): 145-155 (1999) |
| 1998 |
|---|
| 2 | | Debaleena Das,
Nur A. Touba:
Synthesis of Circuits with Low-Cost Concurrent Error Detection Based on Bose-Lin Codes.
VTS 1998: 309-317 |
| 1997 |
|---|
| 1 | | Debaleena Das,
Mark G. Karpovsky:
Exhaustive and Near-Exhaustive Memory Testing Techniques and their BIST Implementations.
J. Electronic Testing 10(3): 215-229 (1997) |
