 | 2009 |
|---|
| 11 |       | Dipankar Das,
Asif Ekbal,
Sivaji Bandyopadhyay:
Acquiring Verb Subcategorization Frames in Bengali from Corpora.
ICCPOL 2009: 386-393 |
| 10 | | Dipankar Das,
Yoshinori Kobayashi,
Yoshinori Kuno:
Efficient Hypothesis Generation through Sub-categorization for Multiple Object Detection.
ISVC (2) 2009: 160-171 |
| 9 | | Dipankar Das,
Yoshinori Kobayashi,
Yoshinori Kuno:
Object Detection and Localization in Clutter Range Images Using Edge Features.
ISVC (2) 2009: 172-183 |
| 8 | | Dipankar Das,
P. P. Chakrabarti,
Rajeev Kumar:
Scenario-based timing verification of multiprocessor embedded applications.
ACM Trans. Design Autom. Electr. Syst. 14(3): (2009) |
| 2008 |
|---|
| 7 | | Dipankar Das,
Al Mansur,
Yoshinori Kobayashi,
Yoshinori Kuno:
An Integrated Method for Multiple Object Detection and Localization.
ISVC (2) 2008: 133-144 |
| 6 | | Rajeev Kumar,
Dipankar Das:
Code compression for performance enhancement of variable-length embedded processors.
ACM Trans. Embedded Comput. Syst. 7(3): (2008) |
| 5 | | Al Mansur,
Katsutoshi Sakata,
Dipankar Das,
Yoshinori Kuno:
Recognition of Plain Objects Using Local Region Matching.
IEICE Transactions 91-D(7): 1906-1913 (2008) |
| 2007 |
|---|
| 4 | | Dipankar Das,
P. P. Chakrabarti,
Rajeev Kumar:
Functional verification of task partitioning for multiprocessor embedded systems.
ACM Trans. Design Autom. Electr. Syst. 12(4): (2007) |
| 2006 |
|---|
| 3 | | Dipankar Das,
Rajeev Kumar,
P. P. Chakrabarti:
Timing Verification of UML Activity Diagram Based Code Block Level Models for Real Time Multiprocessor System-on-Chip Applications.
APSEC 2006: 199-208 |
| 2 | | Rajeev Kumar,
Rahul Chaudhry,
Dipankar Das,
Vibha Rathi,
S. K. Panda,
P. P. Chakrabarti:
SystemC Modeling and Validation of A RISC Processor System.
FDL 2006: 189-197 |
| 2005 |
|---|
| 1 | | Dipankar Das,
Rajeev Kumar,
P. P. Chakrabarti:
Dictionary Based Code Compression for Variable Length Instruction Encodings.
VLSI Design 2005: 545-550 |
