 | 2009 |
|---|
| 8 |       | Debapriya Chatterjee,
Andrew DeOrio,
Valeria Bertacco:
Event-driven gate-level simulation with GP-GPUs.
DAC 2009: 557-562 |
| 7 | | Andrew DeOrio,
Valeria Bertacco:
Human computing for EDA.
DAC 2009: 621-622 |
| 6 | | David Fick,
Andrew DeOrio,
Jin Hu,
Valeria Bertacco,
David Blaauw,
Dennis Sylvester:
Vicis: a reliable network for unreliable silicon.
DAC 2009: 812-817 |
| 5 | | Debapriya Chatterjee,
Andrew DeOrio,
Valeria Bertacco:
GCS: High-performance gate-level simulation with GPGPUs.
DATE 2009: 1332-1337 |
| 4 | | David Fick,
Andrew DeOrio,
Gregory K. Chen,
Valeria Bertacco,
Dennis Sylvester,
David Blaauw:
A highly resilient routing algorithm for fault-tolerant NoCs.
DATE 2009: 21-26 |
| 3 | | Andrew DeOrio,
Ilya Wagner,
Valeria Bertacco:
Dacota: Post-silicon validation of the memory subsystem in multi-core designs.
HPCA 2009: 405-416 |
| 2008 |
|---|
| 2 | | Andrew DeOrio,
Adam Bauserman,
Valeria Bertacco:
Post-silicon verification for cache coherence.
ICCD 2008: 348-355 |
| 2007 |
|---|
| 1 | | Andrew DeOrio,
Adam Bauserman,
Valeria Bertacco:
Chico: An On-chip Hardware Checker for Pipeline Control Logic.
MTV 2007: 91-97 |
