| 2009 | ||
|---|---|---|
| 1 | Rangyu Deng, Weixia Xu, Qiang Dou, Hongwei Zhou, Zefu Dai, Haiyan Chen: An efficient stream memory architecture for heterogeneous multicore processor. ISCC 2009: 287-290 | |
| 1 | Haiyan Chen | [1] |
| 2 | Zefu Dai | [1] |
| 3 | Qiang Dou | [1] |
| 4 | Weixia Xu | [1] |
| 5 | Hongwei Zhou | [1] |