Giorgos Dimitrakopoulos

	2009
15		Yiouli Kritikou, Giorgos Dimitrakopoulos, E. Dimitrellou, Panagiotis Demestichas: A management scheme for improving transportation efficiency and contributing to the enhancement of the social fabric. Telematics and Informatics 26(4): 375-390 (2009)
	2008
14		Nikos Chrysos, Giorgos Dimitrakopoulos: Backlog-Aware Crossbar Schedulers: A New Algorithm and its Efficient Hardware Implementation. Hot Interconnects 2008: 67-74
13		Giorgos Dimitrakopoulos, Nikos Chrysos, Costas Galanopoulos: Fast arbiters for on-chip network switches. ICCD 2008: 664-670
12		Giorgos Dimitrakopoulos, Costas Galanopoulos, Christos Mavrokefalidis, Dimitris Nikolos: Low-Power Leading-Zero Counting and Anticipation Logic for High-Speed Floating Point Units. IEEE Trans. VLSI Syst. 16(7): 837-850 (2008)
	2007
11		Giorgos Dimitrakopoulos, Christos Mavrokefalidis, Costas Galanopoulos, Dimitris Nikolos: Sorter Based Permutation Units for Media-Enhanced Microprocessors. IEEE Trans. VLSI Syst. 15(6): 711-715 (2007)
	2006
10		Giorgos Dimitrakopoulos, Christos Mavrokefalidis, Costas Galanopoulos, Dimitris Nikolos: An Energy-Delay Efficient Subword Permutation Unit. ASAP 2006: 245-252
9		Giorgos Dimitrakopoulos, Christos Mavrokefalidis, Costas Galanopoulos, Dimitris Nikolos: Fast bit permutation unit for media enhanced microprocessors. ISCAS 2006
	2005
8		Giorgos Dimitrakopoulos, Dimitris Nikolos: Closed-Form Bounds for Interconnect-Aware Minimum-Delay Gate Sizing. PATMOS 2005: 308-317
7		Giorgos Dimitrakopoulos, Dimitris Nikolos: High-Speed Parallel-Prefix VLSI Ling Adders. IEEE Trans. Computers 54(2): 225-231 (2005)
6		Costas Efstathiou, Haridimos T. Vergos, Giorgos Dimitrakopoulos, Dimitris Nikolos: Efficient Diminished-1 Modulo 2^n+1 Multipliers. IEEE Trans. Computers 54(4): 491-496 (2005)
	2004
5		Giorgos Dimitrakopoulos, P. Kolovos, P. Kalogerakis, Dimitris Nikolos: Design of High-Speed Low-Power Parallel-Prefix VLSI Adders. PATMOS 2004: 248-257
	2003
4		Giorgos Dimitrakopoulos, Haridimos T. Vergos, Dimitris Nikolos, Costas Efstathiou: A Family of Parallel-Pre.x Modulo 2n - 1 Adders. ASAP 2003: 326-336
3		Giorgos Dimitrakopoulos, Haridimos T. Vergos, Dimitris Nikolos, Costas Efstathiou: A systematic methodology for designing area-time efficient parallel-prefix modulo 2/sup n/ - 1 adders. ISCAS (5) 2003: 225-228
2		Giorgos Dimitrakopoulos, Xrysovalantis Kavousianos, Dimitris Nikolos: Virtual-scan: a novel approach for software-based self-testing of microprocessors. ISCAS (5) 2003: 237-240
	2002
1		Giorgos Dimitrakopoulos, Dimitris Nikolos, Dimitris Bakalis: Bit-Serial Test Pattern Generation by an Accumulator Behaving as a Non-Linear Feedback Shift Register. IOLTW 2002: 152-157

Coauthor Index

1	Dimitris Bakalis	[1]
2	Nikos Chrysos	[13] [14]
3	Panagiotis Demestichas	[15]
4	E. Dimitrellou	[15]
5	Costas Efstathiou	[3] [4] [6]
6	Costas Galanopoulos	[9] [10] [11] [12] [13]
7	P. Kalogerakis	[5]
8	Xrysovalantis Kavousianos	[2]
9	P. Kolovos	[5]
10	Yiouli Kritikou	[15]
11	Christos Mavrokefalidis	[9] [10] [11] [12]
12	Dimitris Nikolos	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
13	Haridimos T. Vergos	[3] [4] [6]

Colors in the list of coauthors