David Duarte

	2006
9		Wei Zhang, Yuh-Fang Tsai, David Duarte, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin: Reducing dynamic and leakage energy in VLIW architectures. ACM Trans. Embedded Comput. Syst. 5(1): 1-28 (2006)
	2003
8		Yuh-Fang Tsai, David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin: Implications of technology scaling on leakage reduction techniques. DAC 2003: 187-190
7		Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Hyun Suk Kim, Wu Ye, David Duarte: Evaluating Integrated Hardware-Software Optimizations Using a Unified Energy Estimation Framework. IEEE Trans. Computers 52(1): 59-76 (2003)
	2002
6		David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin: A Complete Phase-Locked Loop Power Consumption Model. DATE 2002: 1108
5		David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin, Hyun Suk Kim, G. McFarland: Impact of Scaling on the Effectiveness of Dynamic Power Reduction Schemes. ICCD 2002: 382-387
4		David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin: Impact of Technology Scaling in the Clock System Power. ISVLSI 2002: 59-64
3		David Duarte, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mary Jane Irwin: Evaluating Run-Time Techniques for Leakage Power Reduction. VLSI Design 2002: 31-38
	2001
2		Wei Zhang, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, David Duarte, Yuh-Fang Tsai: Exploiting VLIW schedule slacks for dynamic and leakage energy reduction. MICRO 2001: 102-113
1		David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin, Mahmut T. Kandemir: Formulation and Validation of an Energy Dissipation Model for the Clock Generation Circuitry and Distribution Networks. VLSI Design 2001: 248-253

Coauthor Index

1	Mary Jane Irwin	[1] [2] [3] [4] [5] [6] [7] [8] [9]
2	Mahmut T. Kandemir	[1] [2] [7] [9]
3	Hyun Suk Kim	[5] [7]
4	G. McFarland	[5]
5	Yuh-Fang Tsai	[2] [3] [8] [9]
6	Narayanan Vijaykrishnan (Vijaykrishnan Narayanan)	[1] [2] [3] [4] [5] [6] [7] [8] [9]
7	Wu Ye	[7]
8	Wei Zhang	[2] [9]