Robert C. Earle

	1992
1		Gerhard W. Dueck, Robert C. Earle, Parthasarathy P. Tirumalai, Jon T. Butler: Multiple-Valued Programmable Logic Array Minmization by Simulated Annealing. ISMVL 1992: 66-74

Coauthor Index

1	Jon T. Butler	[1]
2	Gerhard W. Dueck	[1]
3	Parthasarathy P. Tirumalai	[1]