Aiman El-Maleh
List of publications from the DBLP Bibliography Server - FAQ
| 2009 | ||
|---|---|---|
| 23 | Wenfa Zhan, Aiman El-Maleh: A new collaborative scheme of test vector compression based on equal-run-length coding (ERLC). CSCWD 2009: 21-25 | |
| 2008 | ||
| 22 | Esa Alghonaim, Aiman El-Maleh, Mohamed Adnan Landolsi: Using input/output queues to increase LDPC decoder performance. AICCSA 2008: 304-308 | |
| 21 | Aiman H. El-Maleh, Bashir M. Al-Hashimi, Aissa Melouki: Transistor-level based defect tolerance for reliable nanoelectronics. AICCSA 2008: 53-60 | |
| 2006 | ||
| 20 | Aiman El-Maleh: An efficient test vector compression technique based on block merging. ISCAS 2006 | |
| 19 | Aiman H. El-Maleh, Sadiq M. Sait, F. Nawaz Khan: Finite state machine state assignment for area and power minimization. ISCAS 2006 | |
| 18 | Aiman H. El-Maleh, S. Saqib Khursheed, Sadiq M. Sait: Efficient Static Compaction Techniques for Sequential Circuits Based on Reverse-Order Restoration and Test Relaxation. IEEE Trans. on CAD of Integrated Circuits and Systems 25(11): 2556-2564 (2006) | |
| 2005 | ||
| 17 | Aiman H. El-Maleh, S. Saqib Khursheed, Sadiq M. Sait: Efficient Static Compaction Techniques for Sequential Circuits Based on Reverse Order Restoration and Test Relaxation. Asian Test Symposium 2005: 378-385 | |
| 2004 | ||
| 16 | Aiman H. El-Maleh, Khaled Al-Utaibi: An efficient test relaxation technique for synchronous sequential circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 23(6): 933-940 (2004) | |
| 2003 | ||
| 15 | Sadiq M. Sait, Aiman H. El-Maleh, Rush H. Al-Abuji: Simulated evolution algorithm for multiobjective VLSI netlist bi-partitioning. ISCAS (5) 2003: 457-460 | |
| 14 | Sadiq M. Sait, Aiman H. El-Maleh, Raslan H. Al-Abaji: General iterative heuristics for VLSI multiobjective partitioning. ISCAS (5) 2003: 497-500 | |
| 13 | Aiman H. El-Maleh, Khaled Al-Utaibi: On efficient extraction of partially specified test sets for synchronous sequential circuits. ISCAS (5) 2003: 545-548 | |
| 12 | Aiman H. El-Maleh, Khaled Al-Utaibi: An Efficient Test Relaxation Technique for Synchronous Sequential Circuits. VTS 2003: 179-185 | |
| 11 | Aiman H. El-Maleh, Yahya E. Osais: Test vector decomposition-based static compaction algorithms for combinational circuits. ACM Trans. Design Autom. Electr. Syst. 8(4): 430-459 (2003) | |
| 2002 | ||
| 10 | Aiman El-Maleh, Ali Al-Suwaiyan: An Efficient Test Relaxation Technique for Combinational & Full-Scan Sequential Circuits. VTS 2002: 53-59 | |
| 2001 | ||
| 9 | Sadiq M. Sait, Habib Youssef, Junaid A. Khan, Aiman H. El-Maleh: Fuzzified Iterative Algorithms for Performance Driven Low Power VLSI Placement. ICCD 2001: 484-487 | |
| 8 | Aiman H. El-Maleh, Yahya E. Osais: A retiming-based test pattern generator design for built-in self test of data path architectures. ISCAS (4) 2001: 550-553 | |
| 7 | Aiman El-Maleh, Esam Khan, Saif al Zahir: A Geometric-Primitives-Based Compression Scheme for Testing Systems-on-a-Chip. VTS 2001: 54-61 | |
| 1998 | ||
| 6 | Aiman H. El-Maleh, Mark Kassab, Janusz Rajski: A Fast Sequential Learning Technique for Real Circuits with Application to Enhancing ATPG Performance. DAC 1998: 625-631 | |
| 1997 | ||
| 5 | Aiman H. El-Maleh, Thomas E. Marchok, Janusz Rajski, Wojciech Maly: Behavior and testability preservation under the retiming transformation. IEEE Trans. on CAD of Integrated Circuits and Systems 16(5): 528-543 (1997) | |
| 1996 | ||
| 4 | Thomas E. Marchok, Aiman H. El-Maleh, Wojciech Maly, Janusz Rajski: A complexity analysis of sequential ATPG. IEEE Trans. on CAD of Integrated Circuits and Systems 15(11): 1409-1423 (1996) | |
| 1995 | ||
| 3 | Aiman H. El-Maleh, Thomas E. Marchok, Janusz Rajski, Wojciech Maly: On Test Set Preservation of Retimed Circuits. DAC 1995: 176-182 | |
| 2 | Thomas E. Marchok, Aiman H. El-Maleh, Janusz Rajski, Wojciech Maly: Testability Implications of Performance-Driven Logic Synthesis. IEEE Design & Test of Computers 12(2): 32-39 (1995) | |
| 1 | Aiman H. El-Maleh, Janusz Rajski: Delay-fault testability preservation of the concurrent decomposition and factorization transformations. IEEE Trans. on CAD of Integrated Circuits and Systems 14(5): 582-590 (1995) | |
| 1 | Raslan H. Al-Abaji | [14] |
| 2 | Rush H. Al-Abuji | [15] |
| 3 | Bashir M. Al-Hashimi | [21] |
| 4 | Ali Al-Suwaiyan | [10] |
| 5 | Khaled Al-Utaibi | [12] [13] [16] |
| 6 | Esa Alghonaim | [22] |
| 7 | Mark Kassab | [6] |
| 8 | Esam Khan | [7] |
| 9 | F. Nawaz Khan | [19] |
| 10 | Junaid A. Khan | [9] |
| 11 | S. Saqib Khursheed | [17] [18] |
| 12 | Mohamed Adnan Landolsi | [22] |
| 13 | Wojciech Maly | [2] [3] [4] [5] |
| 14 | Thomas E. Marchok | [2] [3] [4] [5] |
| 15 | Aissa Melouki | [21] |
| 16 | Yahya E. Osais | [8] [11] |
| 17 | Janusz Rajski | [1] [2] [3] [4] [5] [6] |
| 18 | Sadiq M. Sait | [9] [14] [15] [17] [18] [19] |
| 19 | Habib Youssef | [9] |
| 20 | Saif al Zahir | [7] |
| 21 | Wenfa Zhan | [23] |