 | 2009 |
|---|
| 8 |       | Jia-Wei Fang,
Martin D. F. Wong,
Yao-Wen Chang:
Flip-chip routing with unified area-I/O pad assignments for package-board co-design.
DAC 2009: 336-339 |
| 7 | | Jia-Wei Fang,
Chin-Hsiung Hsu,
Yao-Wen Chang:
An Integer-Linear-Programming-Based Routing Algorithm for Flip-Chip Designs.
IEEE Trans. on CAD of Integrated Circuits and Systems 28(1): 98-110 (2009) |
| 2008 |
|---|
| 6 | | Jia-Wei Fang,
Kuan-Hsien Ho,
Yao-Wen Chang:
Routing for chip-package-board co-design considering differential pairs.
ICCAD 2008: 512-517 |
| 5 | | Jia-Wei Fang,
Yao-Wen Chang:
Area-I/O flip-chip routing for chip-package co-design.
ICCAD 2008: 518-522 |
| 2007 |
|---|
| 4 | | Jia-Wei Fang,
Chin-Hsiung Hsu,
Yao-Wen Chang:
An Integer Linear Programming Based Routing Algorithm for Flip-Chip Design.
DAC 2007: 606-611 |
| 3 | | Yen-Pin Chen,
Jia-Wei Fang,
Yao-Wen Chang:
ECO timing optimization using spare cells.
ICCAD 2007: 530-535 |
| 2 | | Jia-Wei Fang,
I-Jye Lin,
Yao-Wen Chang,
Jyh-Herng Wang:
A Network-Flow-Based RDL Routing Algorithmz for Flip-Chip Design.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(8): 1417-1429 (2007) |
| 2005 |
|---|
| 1 |  | Jia-Wei Fang,
I-Jye Lin,
Ping-Hung Yuh,
Yao-Wen Chang,
Jyh-Herng Wang:
A routing algorithm for flip-chip design.
ICCAD 2005: 753-758 |
