Penelope Faure Coauthor index DBLP Vis pubzone.org

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DBLP keys2002
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMichel Renovell, Penelope Faure, Paolo Prinetto, Yervant Zorian: Testing the Unidimensional Interconnect Architecture of Symmetrical SRAM-Based FPGA. DELTA 2002: 297-301
2001
4no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMichel Renovell, Penelope Faure, Jean Michel Portal, Joan Figueras, Yervant Zorian: IS-FPGA : a new symmetric FPGA architecture with implicit scan. ITC 2001: 924-931
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMichel Renovell, Jean Michel Portal, Penelope Faure, Joan Figueras, Yervant Zorian: A Discussion on Test Pattern Generation for FPGA - Implemented Circuits. J. Electronic Testing 17(3-4): 283-290 (2001)
2000
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMichel Renovell, Jean Michel Portal, Penelope Faure, Joan Figueras, Yervant Zorian: TOF: a tool for test pattern generation optimization of an FPGA application oriented test. Asian Test Symposium 2000: 323-328
1992
1no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLDennis de Champeaux, Doug Lea, Penelope Faure: The Process of Object-Oriented Design. OOPSLA 1992: 45-62

Coauthor Index

1Dennis de Champeaux [1]
2Joan Figueras [2] [3] [4]
3Doug Lea [1]
4Jean Michel Portal [2] [3] [4]
5Paolo Prinetto [5]
6Michel Renovell [2] [3] [4] [5]
7Yervant Zorian [2] [3] [4] [5]

Colors in the list of coauthors

Copyright © Fri Dec 4 16:04:45 2009 by Michael Ley (ley@uni-trier.de)