| 2007 |
|---|
| 56 | EE | Michele Favalli,
Cecilia Metra:
Interactive presentation: Pulse propagation for the detection of small delay defects.
DATE 2007: 1295-1300 |
| 55 | EE | Michele Favalli:
Delay Fault Detection Problems in Circuits Featuring a Low Combinational Depth.
DFT 2007: 170-178 |
| 54 | EE | Michele Favalli,
Marcello Dalpasso:
High Quality Test Vectors for Bridging Faults in the Presence of IC's Parameters Variations.
DFT 2007: 448-456 |
| 2006 |
|---|
| 53 | EE | Michele Favalli:
Diversity Analysis in the Presence of Delay Faults Affecting Duplex Systems.
IEEE Trans. Computers 55(3): 348-352 (2006) |
| 2005 |
|---|
| 52 | EE | Michele Favalli:
A fuzzy model for path delay fault detection.
IEEE Trans. VLSI Syst. 13(8): 943-956 (2005) |
| 2004 |
|---|
| 51 | EE | Michele Favalli:
"Victim Gate" Crosstalk Fault Model.
DFT 2004: 191-199 |
| 50 | EE | Michele Favalli:
Annotated Bit Flip Fault Model.
DFT 2004: 366-376 |
| 49 | EE | Michele Favalli,
Cecilia Metra:
TMR voting in the presence of crosstalk faults at the voter inputs.
IEEE Transactions on Reliability 53(3): 342-348 (2004) |
| 2003 |
|---|
| 48 | EE | Cecilia Metra,
Luca Schiano,
Michele Favalli:
Concurrent detection of power supply noise.
IEEE Transactions on Reliability 52(4): 469-475 (2003) |
| 47 | EE | Cecilia Metra,
Stefano Di Francescantonio,
Michele Favalli,
Bruno Riccò:
Scan flip-flops with on-line testing ability with respect to input delay and crosstalk faults.
Microelectronics Journal 34(1): 23-29 (2003) |
| 2002 |
|---|
| 46 | EE | Michele Favalli,
Marcello Dalpasso:
An Evolutionary Approach to the Design of On-Chip Pseudorandom Test Pattern Generators.
DATE 2002: 1122 |
| 45 | EE | Michele Favalli,
Cecilia Metra:
Problems Due to Open Faults in the Interconnections of Self-Checking Data-Paths.
DATE 2002: 612-619 |
| 44 | EE | Cecilia Metra,
Luca Schiano,
Bruno Riccò,
Michele Favalli:
Self-Checking Scheme for the On-Line Testing of Power Supply Noise.
DATE 2002: 832-836 |
| 43 | EE | Michele Favalli,
Cecilia Metra:
Online Testing Approach for Very Deep-Submicron ICs.
IEEE Design & Test of Computers 19(2): 16-23 (2002) |
| 42 | EE | Michele Favalli,
Marcello Dalpasso:
Bridging fault modeling and simulation for deep submicron CMOS ICs.
IEEE Trans. on CAD of Integrated Circuits and Systems 21(8): 941-953 (2002) |
| 2001 |
|---|
| 41 | EE | Michele Favalli,
Cecilia Metra:
Optimization of error detecting codes for the detection of crosstalk originated errors.
DATE 2001: 290-296 |
| 40 | EE | Michele Favalli,
Cecilia Metra:
Single Output Distributed Two-Rail Checker with Diagnosing Capabilities for Bus Based Self-Checking Architectures.
IOLTW 2001: 100-105 |
| 2000 |
|---|
| 39 | EE | Cecilia Metra,
Michele Favalli,
Bruno Riccò:
On-Line Testing and Diagnosis of Bus Lines with respect to Intermediate Voltage Values.
DATE 2000: 763 |
| 38 | EE | Marcello Dalpasso,
Alessandro Bogliolo,
Luca Benini,
Michele Favalli:
Virtual Fault Simulation of Distributed IP-Based Designs.
DATE 2000: 99- |
| 37 | EE | Cecilia Metra,
Michele Favalli,
Bruno Riccò:
Self-Checking Detection and Diagnosis of Transient, Delay, and Crosstalk Faults Affecting Bus Lines.
IEEE Trans. Computers 49(6): 560-574 (2000) |
| 36 | EE | Alessandro Bogliolo,
Michele Favalli,
Maurizio Damiani:
Enabling testability of fault-tolerant circuits by means of IDDQ-checkable voters.
IEEE Trans. VLSI Syst. 8(4): 415-419 (2000) |
| 1999 |
|---|
| 35 | EE | Michele Favalli,
Cecilia Metra:
On the Design of Self-Checking Functional Units Based on Shannon Circuits.
DATE 1999: 368-375 |
| 34 | EE | Michele Favalli,
Cecilia Metra:
Bus crosstalk fault-detection capabilities of error-detecting codes for on-line testing.
IEEE Trans. VLSI Syst. 7(3): 392-396 (1999) |
| 1998 |
|---|
| 33 | EE | Cecilia Metra,
Michele Favalli,
Bruno Riccò:
Highly Testable and Compact 1-out-of-n Code Checker with Single Output.
DATE 1998: 981-982 |
| 32 | EE | Cecilia Metra,
Michele Favalli,
Bruno Riccò:
Signal Coding Technique and CMOS Gates for Strongly Fault-Secure Combinational Functional Blocks.
DFT 1998: 174-182 |
| 31 | EE | Cecilia Metra,
Michele Favalli,
Bruno Riccò:
On-line detection of logic errors due to crosstalk, delay, and transient faults.
ITC 1998: 524-533 |
| 30 | EE | Cecilia Metra,
Michele Favalli,
Bruno Riccò:
Concurrent Checking of Clock Signal Correctness.
IEEE Design & Test of Computers 15(4): 42-48 (1998) |
| 1997 |
|---|
| 29 | EE | Cecilia Metra,
Michele Favalli,
Bruno Riccò:
Compact and low power on-line self-testing voting scheme.
DFT 1997: 137-147 |
| 28 | EE | Michele Favalli,
Cecilia Metra:
Low-level error recovery mechanism for self-checking sequential circuits.
DFT 1997: 234-242 |
| 27 | | Cecilia Metra,
Michele Favalli,
Bruno Riccò:
On-Line Testing Scheme for Clock's Faults.
ITC 1997: 587-596 |
| 26 | EE | Cecilia Metra,
Michele Favalli,
Bruno Riccò:
Highly testable and compact single output comparator.
VTS 1997: 210-215 |
| 25 | EE | Marcello Dalpasso,
Michele Favalli:
A method for increasing the IDDQ testability.
IEEE Trans. on CAD of Integrated Circuits and Systems 16(10): 1186-1188 (1997) |
| 24 | EE | Cecilia Metra,
Michele Favalli,
Piero Olivo,
Bruno Riccò:
On-line detection of bridging and delay faults in functional blocks of CMOS self-checking circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 16(7): 770-776 (1997) |
| 1996 |
|---|
| 23 | EE | Cecilia Metra,
Michele Favalli,
Bruno Riccò:
Embedded two-rail checkers with on-line testing ability.
VTS 1996: 145-150 |
| 22 | EE | Michele Favalli,
Cecilia Metra:
Sensing circuit for on-line detection of delay faults.
IEEE Trans. VLSI Syst. 4(1): 130-133 (1996) |
| 21 | EE | Michele Favalli,
Marcello Dalpasso,
Piero Olivo:
Modeling and simulation of broken connections in CMOS IC's.
IEEE Trans. on CAD of Integrated Circuits and Systems 15(7): 808-814 (1996) |
| 1995 |
|---|
| 20 | EE | Michele Favalli,
Luca Benini:
Analysis of glitch power dissipation in CMOS ICs.
ISLPD 1995: 123-128 |
| 19 | EE | Marcello Dalpasso,
Michele Favalli,
Piero Olivo:
Test pattern generation for I/sub DDQ/: increasing test quality.
VTS 1995: 304-309 |
| 1994 |
|---|
| 18 | | Cecilia Metra,
Michele Favalli,
Bruno Riccò:
CMOS Self Checking Circuits with Faulty Sequential Functional Block.
DFT 1994: 133-141 |
| 17 | | Cecilia Metra,
Michele Favalli,
Bruno Riccò:
Highly Testable and Compact 1-out-of-n CMOS Checkers.
DFT 1994: 142-150 |
| 16 | | Michele Favalli,
Marcello Dalpasso,
Piero Olivo,
Bruno Riccò:
Modeling of Broken Connections Faults in CMOS ICs.
EDAC-ETC-EUROASIC 1994: 159-164 |
| 1993 |
|---|
| 15 | | Cecilia Metra,
Michele Favalli,
Piero Olivo,
Bruno Riccò:
Design Rules for CMOS Self Checking Circuits with Parametric Faults in the Functional Block.
DFT 1993: 271-278 |
| 14 | | Cecilia Metra,
Michele Favalli,
Piero Olivo,
Bruno Riccò:
A Highly Testable 1-out-of-3 CMOS Checker.
DFT 1993: 279-286 |
| 13 | | Michele Favalli,
Marcello Dalpasso,
Piero Olivo,
Bruno Riccò:
Analyss of Dynamic Effects of Resistive Bridging Faults in CMOS and BiCMOS Digital ICs.
ITC 1993: 865-874 |
| 12 | EE | Michele Favalli,
Marcello Dalpasso,
Piero Olivo,
Bruno Riccò:
Analysis of resistive bridging fault detection in BiCMOS digital ICs.
IEEE Trans. VLSI Syst. 1(3): 342-355 (1993) |
| 11 | EE | Marcello Dalpasso,
Michele Favalli,
Piero Olivo,
Bruno Riccò:
Fault simulation of parametric bridging faults in CMOS IC's.
IEEE Trans. on CAD of Integrated Circuits and Systems 12(9): 1403-1410 (1993) |
| 1992 |
|---|
| 10 | | Michele Favalli,
Marcello Dalpasso,
Piero Olivo,
Bruno Riccò:
Analysis of Steady State Detection of Resistive Bridging Faults in BiCMOS Digital ICs.
ITC 1992: 466-475 |
| 9 | | Marcello Dalpasso,
Michele Favalli,
Piero Olivo,
Bruno Riccò:
Parametric Bridging Fault Characterization for the Fault Simulation of Library-Based ICs.
ITC 1992: 486-495 |
| 8 | | Cecilia Metra,
Michele Favalli,
Piero Olivo,
Bruno Riccò:
CMOS Checkers with Testable Bridging and Transistor Stuck-on Faults.
ITC 1992: 948-957 |
| 7 | EE | Michele Favalli,
Piero Olivo,
Bruno Riccò:
A probabilistic fault model for `analog' faults in digital CMOS circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 11(11): 1459-1462 (1992) |
| 6 | EE | Silvia Ercolani,
Michele Favalli,
Maurizio Damiani,
Piero Olivo,
Bruno Riccò:
Testability measures in pseudorandom testing.
IEEE Trans. on CAD of Integrated Circuits and Systems 11(6): 794-800 (1992) |
| 1991 |
|---|
| 5 | EE | Michele Favalli,
Piero Olivo,
Bruno Riccò:
A novel critical path heuristic for fast fault grading.
IEEE Trans. on CAD of Integrated Circuits and Systems 10(4): 544-548 (1991) |
| 4 | EE | Michele Favalli,
Piero Olivo,
Maurizio Damiani,
Bruno Riccò:
Fault simulation of unconventional faults in CMOS circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 10(5): 677-682 (1991) |
| 1990 |
|---|
| 3 | EE | Maurizio Damiani,
Piero Olivo,
Michele Favalli,
Silvia Ercolani,
Bruno Riccò:
Aliasing in signature analysis testing with multiple input shift registers.
IEEE Trans. on CAD of Integrated Circuits and Systems 9(12): 1344-1353 (1990) |
| 1989 |
|---|
| 2 | | Michele Favalli,
Piero Olivo,
Maurizio Damiani,
Bruno Riccò:
CMOS Design for Improved IC Testability.
ITC 1989: 934 |
| 1 | EE | Maurizio Damiani,
Piero Olivo,
Michele Favalli,
Bruno Riccò:
An analytical model for the aliasing probability in signature analysis testing.
IEEE Trans. on CAD of Integrated Circuits and Systems 8(11): 1133-1144 (1989) |
