 | 2008 |
| 24 |  | Milagros Fernández,
Eric Villemonte de la Clergerie,
Manuel Vilares Ferro:
Mining conceptual graphs for knowledge acquisition.
CIKM-iNEWS 2008: 25-32 |
| 2006 |
| 23 |  | Fredy Rivera,
Marcos Sanchez-Elez,
Milagros Fernández,
Román Hermida,
Nader Bagherzadeh:
Configuration Scheduling for Conditional Branch Execution Onto Multi-Context Reconfigurable Architectures.
FPL 2006: 1-8 |
| 2005 |
| 22 |  | Fredy Rivera,
Milagros Fernández,
Nader Bagherzadeh:
An Approach to Execute Conditional Branches onto SIMD Multi-Context Reconfigurable Architectures.
DSD 2005: 396-402 |
| 21 |  | Fredy Rivera,
Marcos Sanchez-Elez,
Milagros Fernández,
Román Hermida,
Nader Bagherzadeh:
Low Power Data Prefetch for 3D Image Applications on Coarse-Grain Reconfigurable Architectures.
IPDPS 2005 |
| 2004 |
| 20 |  | Fredy Rivera,
Marcos Sanchez-Elez,
Milagros Fernández,
Román Hermida,
Nader Bagherzadeh:
Efficient mapping of hierarchical trees on coarse-grain reconfigurable architectures.
CODES+ISSS 2004: 30-35 |
| 2003 |
| 19 |  | Marcos Sanchez-Elez,
Milagros Fernández,
Manuel L. Anido,
Haitao Du,
Nader Bagherzadeh,
Román Hermida:
Low Energy Data Management for Different On-Chip Memory Levels in Multi-Context Reconfigurable Architectures.
DATE 2003: 10036-10043 |
| 18 |  | Haitao Du,
Marcos Sanchez-Elez,
Nozar Tabrizi,
Nader Bagherzadeh,
Manuel L. Anido,
Milagros Fernández:
Interactive Ray Tracing on Reconfigurable SIMD MorphoSys.
DATE 2003: 20144-20149 |
| 17 |  | Marcos Sanchez-Elez,
Haitao Du,
Nozar Tabrizi,
Yun Long,
Nader Bagherzadeh,
Milagros Fernández:
Algorithm optimizations and mapping scheme for interactive ray tracing on a reconfigurable architecture.
Computers & Graphics 27(5): 701-713 (2003) |
| 2002 |
| 16 |  | Marcos Sanchez-Elez,
Milagros Fernández,
Rafael Maestre,
Román Hermida,
Nader Bagherzadeh,
Fadi J. Kurdahi:
A Complete Data Scheduler for Multi-Context Reconfigurable Architectures.
DATE 2002: 547-552 |
| 2001 |
| 15 |  | Marcos Sanchez-Elez,
Milagros Fernández,
Román Hermida,
Rafael Maestre,
Fadi J. Kurdahi,
Nader Bagherzadeh:
A data scheduler for multi-context reconfigurable architectures.
ISSS 2001: 177-182 |
| 14 |  | Rafael Maestre,
F. Kurdahl,
Milagros Fernández,
Román Hermida,
Nader Bagherzadeh,
Hartej Singh:
A formal approach to context scheduling for multicontext reconfigurable architectures.
IEEE Trans. VLSI Syst. 9(1): 173-185 (2001) |
| 13 |  | Rafael Maestre,
Fadi J. Kurdahi,
Milagros Fernández,
Román Hermida,
Nader Bagherzadeh,
Hartej Singh:
A framework for reconfigurable computing: task scheduling and context management.
IEEE Trans. VLSI Syst. 9(6): 858-873 (2001) |
| 12 |  | Rafael Maestre,
Fadi J. Kurdahi,
Milagros Fernández,
Román Hermida,
Nader Bagherzadeh,
Hartej Singh:
Kernel scheduling techniques for efficient solution space exploration in reconfigurable computing.
Journal of Systems Architecture 47(3-4): 277-292 (2001) |
| 2000 |
| 11 |  | Rafael Maestre,
Milagros Fernández,
Román Hermida,
Fadi J. Kurdahi,
Nader Bagherzadeh,
Hartej Singh:
Optimal vs. Heuristic Approaches to Context Scheduling for Multi-Context Reconfigurable Architectures.
FCCM 2000: 297-298 |
| 10 |  | Rafael Maestre,
Milagros Fernández,
Román Hermida,
Fadi J. Kurdahi,
Nader Bagherzadeh,
Hartej Singh:
Optimal vs. Heuristic Approaches to Context Scheduling for Multi-Context Reconfigurable Architectures.
ICCD 2000: 575-576 |
| 9 |  | Rafael Maestre,
Fadi J. Kurdahi,
Milagros Fernández,
Nader Bagherzadeh,
Hartej Singh:
Configuration Management in Multi-Context Reconfigurable Systems for Simultaneous Performance and Power Optimization.
ISSS 2000: 107-114 |
| 1999 |
| 8 |  | Rafael Maestre,
Fadi J. Kurdahi,
Nader Bagherzadeh,
Hartej Singh,
Román Hermida,
Milagros Fernández:
Kernel Scheduling in Reconfigurable Computing.
DATE 1999: 90-96 |
| 7 |  | Rafael Maestre,
Milagros Fernández,
Román Hermida,
Nader Bagherzadeh:
A Framework for Scheduling and Context Allocation in Reconfigurable Computing.
ISSS 1999: 134-140 |
| 1997 |
| 6 |  | José M. Mendías,
Román Hermida,
Milagros Fernández:
Formal Techniques for Hardware Allocation.
VLSI Design 1997: 161-165 |
| 5 |  | Hortensia Mecha,
Milagros Fernández:
Interconnection Delay and Clock Cycle Selection in High Level Synthesis.
VLSI Design 1997: 504-505 |
| 4 |  | R. Moreno,
Román Hermida,
Milagros Fernández,
Hortensia Mecha:
A unified approach for scheduling and allocation.
Integration 23(1): 1-35 (1997) |
| 1996 |
| 3 |  | R. Moreno,
Román Hermida,
Milagros Fernández:
Register estimation in unscheduled dataflow graphs.
ACM Trans. Design Autom. Electr. Syst. 1(3): 396-403 (1996) |
| 2 |  | Hortensia Mecha,
Milagros Fernández,
Francisco Tirado,
Julio Septién,
D. Motes,
Katzalin Olcoz:
A method for area estimation of data-path in high level synthesis.
IEEE Trans. on CAD of Integrated Circuits and Systems 15(2): 258-265 (1996) |
| 1994 |
| 1 |  | Hortensia Mecha,
Milagros Fernández,
Román Hermida,
Daniel Mozos,
Katzalin Olcoz:
Clock cycle estimation based on dead time and control unit area minimization.
Microprocessing and Microprogramming 40(10-12): 821-824 (1994) |