| 2009 | ||
|---|---|---|
| 65 | Antonino Tumeo, Marco Branca, Lorenzo Camerini, Marco Ceriani, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto: Prototyping pipelined applications on a heterogeneous FPGA multiprocessor virtual platform. ASP-DAC 2009: 317-322 | |
| 64 | Antonino Tumeo, Marco Branca, Lorenzo Camerini, Christian Pilato, Pier Luca Lanzi, Fabrizio Ferrandi, Donatella Sciuto: Mapping pipelined applications onto heterogeneous embedded systems: a bayesian optimization algorithm based approach. CODES+ISSS 2009: 443-452 | |
| 63 | Antonino Tumeo, Christian Pilato, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto: HW/SW methodologies for synchronization in FPGA multiprocessors. FPGA 2009: 265-268 | |
| 62 | Marco Branca, Lorenzo Camerini, Fabrizio Ferrandi, Pier Luca Lanzi, Christian Pilato, Donatella Sciuto, Antonino Tumeo: Evolutionary algorithms for the mapping of pipelined applications onto heterogeneous embedded systems. GECCO 2009: 1435-1442 | |
| 61 | Antonino Tumeo, Simone Borgio, Davide Bosisio, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto: A multiprocessor self-reconfigurable JPEG2000 encoder. IPDPS 2009: 1-8 | |
| 60 | Muhammad Rashid, Fabrizio Ferrandi, Koen Bertels: hArtes design flow for heterogeneous platforms. ISQED 2009: 330-338 | |
| 2008 | ||
| 59 | Antonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto: Lightweight DMA management mechanisms for multiprocessors on FPGA. ASAP 2008: 275-280 | |
| 58 | Antonino Tumeo, Marco Branca, Lorenzo Camerini, Marco Ceriani, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto: A Dual-Priority Real-Time Multiprocessor System on FPGA for Automotive Applications. DATE 2008: 1039-1044 | |
| 57 | Christian Pilato, Daniele Loiacono, Fabrizio Ferrandi, Pier Luca Lanzi, Donatella Sciuto: High-level synthesis with multi-objective genetic algorithm: A comparative encoding analysis. IEEE Congress on Evolutionary Computation 2008: 3334-3341 | |
| 56 | Fabrizio Ferrandi, Pier Luca Lanzi, Daniele Loiacono, Christian Pilato, Donatella Sciuto: A Multi-objective Genetic Algorithm for Design Space Exploration in High-Level Synthesis. ISVLSI 2008: 417-422 | |
| 55 | Christian Pilato, Antonino Tumeo, Gianluca Palermo, Fabrizio Ferrandi, Pier Luca Lanzi, Donatella Sciuto: Improving evolutionary exploration to area-time optimization of FPGA designs. Journal of Systems Architecture - Embedded Systems Design 54(11): 1046-1057 (2008) | |
| 2007 | ||
| 54 | Antonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto: A design kit for a fully working shared memory multiprocessor on FPGA. ACM Great Lakes Symposium on VLSI 2007: 219-222 | |
| 53 | Antonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto: A Self-Reconfigurable Implementation of the JPEG Encoder. ASAP 2007: 24-29 | |
| 52 | Fabrizio Ferrandi, Pier Luca Lanzi, Gianluca Palermo, Christian Pilato, Donatella Sciuto, Antonino Tumeo: An Evolutionary Approach to Area-Time Optimization of FPGA designs. ICSAMOS 2007: 145-152 | |
| 51 | Antonino Tumeo, Marco Branca, Lorenzo Camerini, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto: An Interrupt Controller for FPGA-based Multiprocessors. ICSAMOS 2007: 82-87 | |
| 50 | Christian Pilato, Gianluca Palermo, Antonino Tumeo, Fabrizio Ferrandi, Donatella Sciuto, Pier Luca Lanzi: Fitness inheritance in evolutionary and multi-objective high-level synthesis. IEEE Congress on Evolutionary Computation 2007: 3459-3466 | |
| 49 | Fabrizio Ferrandi, Luca Fossati, Marco Lattuada, Gianluca Palermo, Donatella Sciuto, Antonino Tumeo: Automatic Parallelization of Sequential Specifications for Symmetric MPSoCs. IESS 2007: 179-192 | |
| 48 | Antonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto: A Pipelined Fast 2D-DCT Accelerator for FPGA-based SoCs. ISVLSI 2007: 331-336 | |
| 47 | Antonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto: An Internal Partial Dynamic Reconfiguration Implementation of the JPEG Encoder for Low-Cost FPGAsb. ISVLSI 2007: 449-450 | |
| 46 | S. Corbetta, Fabrizio Ferrandi, Massimo Morandi, Marco Novati, Marco D. Santambrogio, Donatella Sciuto: Two Novel Approaches to Online Partial Bitstream Relocation in a Dynamically Reconfigurable System. ISVLSI 2007: 457-458 | |
| 45 | Angelo P. E. Rosiello, Fabrizio Ferrandi, Davide Pandini, Donatella Sciuto: A Hash-based Approach for Functional Regularity Extraction During Logic Synthesis. ISVLSI 2007: 92-97 | |
| 2006 | ||
| 44 | Roberto Cordone, Fabrizio Ferrandi, Marco D. Santambrogio, Gianluca Palermo, Donatella Sciuto: Using speculative computation and parallelizing techniques to improve scheduling of control based designs. ASP-DAC 2006: 898-904 | |
| 43 | Carlo Amicucci, Fabrizio Ferrandi, Marco D. Santambrogio, Donatella Sciuto: SyCERS: a SystemC Design Exploration Framework for SoC Reconfigurable Architecture. ERSA 2006: 63-69 | |
| 42 | Francesco Bruschi, Fabrizio Ferrandi: A SystemC-based Framework of Communication Architecture. FDL 2006: 319-327 | |
| 41 | Simone Borgio, Davide Bosisio, Fabrizio Ferrandi, Matteo Monchiero, Marco D. Santambrogio, Donatella Sciuto, Antonino Tumeo: Hardware DWT accelerator for MultiProcessor System-on-Chip on FPGA. ICSAMOS 2006: 107-114 | |
| 40 | Fabrizio Ferrandi, G. Ferrara, R. Palazzo, Vincenzo Rana, Marco D. Santambrogio: VHDL to FPGA automatic IP-Core generation: a case study on Xilinx design flow. IPDPS 2006 | |
| 39 | Tiziana Gravagnoli, Fabrizio Ferrandi, Pier Luca Lanzi, Donatella Sciuto: Automatic Test Pattern Generation with BOA. PPSN 2006: 423-432 | |
| 2005 | ||
| 38 | Alberto Donato, Fabrizio Ferrandi, Massimo Redaelli, Marco D. Santambrogio, Donatella Sciuto: Caronte: A Complete Methodology for the Implementation of Partially Dynamically Self-Reconfiguring Systems on FPGA Platforms. FCCM 2005: 321-322 | |
| 37 | Fabrizio Ferrandi, Marco D. Santambrogio, Donatella Sciuto: A Design Methodology for Dynamic Reconfiguration: The Caronte Architecture. IPDPS 2005 | |
| 36 | Alberto Donato, Fabrizio Ferrandi, Massimo Redaelli, Marco D. Santambrogio, Donatella Sciuto: Caronte: A methodology for the Implementation of Partially dynamically Self-Reconfiguring Systems on FPGA Platforms. VLSI-SoC 2005: 87-109 | |
| 35 | Francesco Bruschi, Fabrizio Ferrandi, Donatella Sciuto: A Framework for the Functional Verification of SystemC Models. International Journal of Parallel Programming 33(6): 667-695 (2005) | |
| 2004 | ||
| 34 | Fabrizio Ferrandi, Pier Luca Lanzi, Donatella Sciuto, Mara Tanelli: System-level metrics for hardware/software architectural mapping. DELTA 2004: 231-236 | |
| 33 | Fabrizio Ferrandi, Pier Luca Lanzi, Donatella Sciuto: System Level Hardware-Software Design Exploration with XCS. GECCO (2) 2004: 763-773 | |
| 2003 | ||
| 32 | Francesco Bruschi, Fabrizio Ferrandi: Synthesis of Complex Control Structures from Behavioral SystemC Models. DATE 2003: 20112-20119 | |
| 31 | Fabrizio Ferrandi, Franco Fummi, Graziano Pravadelli, Donatella Sciuto: Identification of design errors through functional testing. IEEE Transactions on Reliability 52(4): 400-412 (2003) | |
| 2002 | ||
| 30 | Francesco Bruschi, Michele Chiamenti, Fabrizio Ferrandi, Donatella Sciuto: Error Simulation Based on the SystemC Design Description Language. DATE 2002: 1135 | |
| 29 | Fabrizio Ferrandi, Michele Rendine, Donatella Sciuto: Functional Verification for SystemC Descriptions Using Constraint Solving. DATE 2002: 744-751 | |
| 28 | Fabrizio Ferrandi, Franco Fummi, Donatella Sciuto: Test Generation and Testability Alternatives Exploration of Critical Algorithms for Embedded Applications. IEEE Trans. Computers 51(2): 200-215 (2002) | |
| 27 | Giuseppe Biasoli, Fabrizio Ferrandi, Alessandro Fin, Franco Fummi, Donatella Sciuto: Behavioral test generation for the selection of BIST logic. Journal of Systems Architecture 47(10): 821-829 (2002) | |
| 2001 | ||
| 26 | Fabrizio Ferrandi, G. Ferrara, Donatella Sciuto, Alessandro Fin, Franco Fummi: Functional test generation for behaviorally sequential models. DATE 2001: 403-410 | |
| 25 | Anna Antola, Fabrizio Ferrandi, Vincenzo Piuri, Mariagiovanna Sami: Semiconcurrent Error Detection in Data Paths. IEEE Trans. Computers 50(5): 449-465 (2001) | |
| 24 | Roberto Cordone, Fabrizio Ferrandi, Donatella Sciuto, Roberto Wolfler Calvo: An efficient heuristic approach to solve the unate covering problem. IEEE Trans. on CAD of Integrated Circuits and Systems 20(12): 1377-1388 (2001) | |
| 2000 | ||
| 23 | Roberto Cordone, Fabrizio Ferrandi, Donatella Sciuto, Roberto Wolfler Calvo: An Efficient Heuristic Approach to Solve the Unate Covering Problem. DATE 2000: 364-371 | |
| 22 | Giuseppe Biasoli, Fabrizio Ferrandi, Donatella Sciuto, Alessandro Fin, Franco Fummi: BIST Architectures Selection Based on Behavioral Testing. DFT 2000: 292-298 | |
| 21 | Fabrizio Ferrandi, Donatella Sciuto, Alessandro Fin, Franco Fummi: An Application of Genetic Algorithms and BDDs to Functional Testing. ICCD 2000: 48- | |
| 20 | Fabrizio Ferrandi, G. Fornara, Donatella Sciuto, G. Ferrara, Franco Fummi: Testability Alternatives Exploration through Functional Testing. VTS 2000: 423-430 | |
| 19 | Fabrizio Ferrandi, Franco Fummi, Enrico Macii, Massimo Poncino, Donatella Sciuto: Symbolic optimization of interacting controllers based onredundancy identification and removal. IEEE Trans. on CAD of Integrated Circuits and Systems 19(7): 760-772 (2000) | |
| 1999 | ||
| 18 | Fabrizio Ferrandi, Franco Fummi, Luca Gerli, Donatella Sciuto: Symbolic Functional Vector Generation for VHDL Specifications. DATE 1999: 442- | |
| 17 | Marco Brera, Fabrizio Ferrandi, Donatella Sciuto, Franco Fummi: Increase the Behavioral Fault Model Accuracy Using High-Level Synthesis Information. DFT 1999: 174-180 | |
| 1998 | ||
| 16 | Fabrizio Ferrandi, Franco Fummi, Enrico Macii, Massimo Poncino: Power Estimation of Behavioral Descriptions. DATE 1998: 762-766 | |
| 15 | F. S. Bietti, Fabrizio Ferrandi, Franco Fummi, Donatella Sciuto: VHDL Testability Analysis Based on Fault Clustering and Implicit Fault Injection. Great Lakes Symposium on VLSI 1998: 237-242 | |
| 14 | Fabrizio Ferrandi, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi, Fabio Somenzi: Symbolic algorithms for layout-oriented synthesis of pass transistor logic circuits. ICCAD 1998: 235-241 | |
| 13 | Fabrizio Ferrandi, Franco Fummi, Donatella Sciuto: Implicit test generation for behavioral VHDL models. ITC 1998: 587- | |
| 1997 | ||
| 12 | Fabrizio Ferrandi, Franco Fummi, Laura Pozzi, Mariagiovanna Sami: Configuration-Specific Test Pattern Extraction for Field Programmable Gate Arrays. DFT 1997: 85-93 | |
| 11 | Giacomo Buonanno, Fabrizio Ferrandi, L. Ferrandi, Franco Fummi, Donatella Sciuto: How an "Evolving" Fault Model Improves the Behavioral Test Generation. Great Lakes Symposium on VLSI 1997: 124- | |
| 10 | M. Bacis, Giacomo Buonanno, Fabrizio Ferrandi, Franco Fummi, Luca Gerli, Donatella Sciuto: Application of a Testing Framework to VHDL Descriptions at Different Abstraction Levels. ICCD 1997: 654-658 | |
| 9 | Fabrizio Ferrandi, Franco Fummi, Donatella Sciuto, Enrico Macii, Massimo Poncino: Testing Core-Based Systems: A Symbolic Methodology. IEEE Design & Test of Computers 14(4): 69-77 (1997) | |
| 1996 | ||
| 8 | Fabrizio Ferrandi, Franco Fummi, Enrico Macii, Massimo Poncino, Donatella Sciuto: Symbolic Optimization of FSM Networks Based on Sequential ATPG Techniques. DAC 1996: 467-470 | |
| 7 | Fabrizio Ferrandi, Franco Fummi, Enrico Macii, Massimo Poncino, Donatella Sciuto: Test Generation for Networks of Interacting FSMs Using Symbolic Techniques. Great Lakes Symposium on VLSI 1996: 208-213 | |
| 6 | Roberto Bevacqua, Luca Guerrazzi, Fabrizio Ferrandi, Franco Fummi: Implicit Test Sequences Compaction for Decreasing Test Application Cos. ICCD 1996: 384-382 | |
| 1995 | ||
| 5 | Giacomo Buonanno, Fabrizio Ferrandi, Donatella Sciuto: Data Path Testability Analysis Based on BDDs. ISCAS 1995: 2012-2014 | |
| 1994 | ||
| 4 | Massimo Bombana, Giacomo Buonanno, Patrizia Cavalloro, Fabrizio Ferrandi, Donatella Sciuto, Giuseppe Zaza: ALADIN: a multilevel testability analyzer for VLSI system design. IEEE Trans. VLSI Syst. 2(2): 157-171 (1994) | |
| 3 | Fabrizio Ferrandi: Reduction of fault detection costs through a BDD formalism. Microprocessing and Microprogramming 40(10-12): 841-844 (1994) | |
| 1993 | ||
| 2 | Massimo Bombana, Giacomo Buonanno, Patrizia Cavalloro, Fabrizio Ferrandi, Donatella Sciuto, Giuseppe Zaza: Reduction of Fault Detection Costs through Testable Design of Sequential Architectures with Signal Feedbacks. DFT 1993: 223-230 | |
| 1 | Massimo Bombana, Giacomo Buonanno, Patrizia Cavalloro, Fabrizio Ferrandi, Donatella Sciuto, Giuseppe Zaza: An Expert Solution to Functional Testability Analysis of VLSI Circuits. SEKE 1993: 263-265 | |