Gennady Feygin Coauthor index DBLP Vis pubzone.org

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DBLP keys1994
4no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLGennady Feygin, P. Glenn Gulak, Paul Chow: Architectural Advances in the VLSI Implementation of Arithmetic Coding for Binary Image Compression. Data Compression Conference 1994: 254-263
3no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLGennady Feygin, P. Glenn Gulak, Paul Chow: Minimizing Excess Code Length and VLSI Complexity in the Multiplication Free Approximation of Arithmetic Coding. Inf. Process. Manage. 30(6): 805-816 (1994)
1993
2no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLGennady Feygin, P. Glenn Gulak, Paul Chow: Minimizing Error and VLSI Complexity in the Multiplication-Free Approximation of Arithmetic Coding. Data Compression Conference 1993: 118-127
1no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLGennady Feygin, Paul Chow, P. Glenn Gulak, John Chappel, Grant Goodes, Oswin Hall, Ahmad Sayes, Satwant Singh, Michael B. Smith, Steven J. E. Wilton: A VLSI Implementation of a Cascade Viterbi Decoder with Traceback. ISCAS 1993: 1945-1948

Coauthor Index

1John Chappel [1]
2Paul Chow [1] [2] [3] [4]
3Grant Goodes [1]
4P. Glenn Gulak [1] [2] [3] [4]
5Oswin Hall [1]
6Ahmad Sayes [1]
7Satwant Singh [1]
8Michael B. Smith [1]
9Steven J. E. Wilton [1]

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