 | 2008 |
|---|
| 6 |       | Scott Fischaber,
John McAllister,
Roger Woods:
Memory-Centric Hardware Synthesis from Dataflow Models.
SAMOS 2008: 197-206 |
| 2007 |
|---|
| 5 | | Scott Fischaber,
Roger Woods,
John McAllister:
SOC Memory Hierarchy Derivation from Dataflow Graphs.
SiPS 2007: 469-474 |
| 4 | | John McAllister,
Roger Woods,
Scott Fischaber,
E. Malins:
Rapid implementation and optimisation of DSP systems on FPGA-centric heterogeneous platforms.
Journal of Systems Architecture 53(8): 511-523 (2007) |
| 2006 |
|---|
| 3 | | Scott Fischaber,
John McAllister,
Roger Woods,
E. Malins:
Muir Hardware Synthesis for Multimedia Applications.
ESTImedia 2006: 101-106 |
| 2005 |
|---|
| 2 |  | Scott Fischaber,
R. Hasson,
John McAllister,
Roger Woods:
FPGA Core Network Implementation and Optimization: A Case Study.
FPT 2005: 319-320 |
| 1 | | John McAllister,
Roger Woods,
D. Reilly,
Scott Fischaber,
R. Hasson:
Rapid Implementation and Optimisation of DSP Systems on SoPC Heterogeneous Platforms.
SAMOS 2005: 414-423 |
