| 2006 | ||
|---|---|---|
| 2 | Laurent Fesquet, Bertrand Folco, M. Steiner, Marc Renaudin: State-holding in Look-Up Tables: application to asynchronous logic. VLSI-SoC 2006: 12-17 | |
| 2005 | ||
| 1 | Bertrand Folco, Vivian Brégier, Laurent Fesquet, Marc Renaudin: Technology Mapping for Area Optimized Quasi Delay Insensitive Circuits. VLSI-SoC 2005: 55-69 | |
| 1 | Vivian Brégier | [1] |
| 2 | Laurent Fesquet | [1] [2] |
| 3 | Marc Renaudin | [1] [2] |
| 4 | M. Steiner | [2] |