| 2004 |
|---|
| 4 | EE | Hideharu Amano,
Takeshi Inuo,
Hirokazu Kami,
Taro Fujii,
Masayasu Suzuki:
Techniques for Virtual Hardware on a Dynamically Reconfigurable Processor - An Approach to Tough Cases.
FPL 2004: 464-473 |
| 2000 |
|---|
| 3 | EE | Yuichiro Shibata,
Masaki Uno,
Hideharu Amano,
K. Furuta,
Taro Fujii,
Masato Motomura:
A Virtual Hardware System on a Dynamically Reconfigurable Logic Device.
FCCM 2000: 295-296 |
| 1998 |
|---|
| 2 | | Akihiro Takamura,
Motokazu Ozawa,
Izumi Fukasaku,
Taro Fujii,
Yoichiro Ueno,
Masashi Imai,
Masashi Kuwako,
Takashi Nanya:
TITAC-2: An Asynchronous 32-bit Microprocessor.
ASP-DAC 1998: 319-320 |
| 1997 |
|---|
| 1 | | Akihiro Takamura,
Masashi Kuwako,
Masashi Imai,
Taro Fujii,
Motokazu Ozawa,
Izumi Fukasaku,
Yoichiro Ueno,
Takashi Nanya:
TITAC-2: An asynchronous 32-bit microprocessor based on Scalable-Delay-Insensitive model.
ICCD 1997: 288-294 |
