 | 2009 |
| 15 |  | Ahmet Oncu,
Minoru Fujishima:
Low-power CMOS transceiver circuits for 60GHz band millimeter-wave impulse radio.
ASP-DAC 2009: 99-100 |
| 14 |  | Yasuo Manzawa,
Masato Sasaki,
Minoru Fujishima:
High-Attenuation Power Line for Wideband Decoupling.
IEICE Transactions 92-C(6): 792-797 (2009) |
| 2008 |
| 13 |  | Kyoya Takano,
Mizuki Motoyoshi,
Minoru Fujishima:
4.8 GHz CMOS Frequency Multiplier Using Subharmonic Pulse-Injection Locking for Spurious Suppression.
IEICE Transactions 91-C(11): 1738-1743 (2008) |
| 2007 |
| 12 |  | Ahmet Oncu,
B. B. M. Wasanthamala Badalawa,
Tong Wang,
Minoru Fujishima:
22-29GHz Ultra-Wideband CMOS Pulse Generator for Collision Avoidance Short Range Vehicular Radar Sensors.
ASP-DAC 2007: 94-95 |
| 11 |  | Ivan Chee Hong Lai,
Yuki Kambayashi,
Minoru Fujishima:
50GHz Double-Balanced Up-Conversion Mixer Using CMOS 90nm Process.
ISCAS 2007: 2542-2545 |
| 10 |  | Koji Ishibashi,
Ivan Chee Hong Lai,
Kyoya Takano,
Minoru Fujishima:
A Scalable Model of Shielded Capacitors Using Mirror Image Effects.
IEICE Transactions 90-C(12): 2237-2244 (2007) |
| 9 |  | Ivan Chee Hong Lai,
Minoru Fujishima:
An Integrated Low-Power CMOS Up-Conversion Mixer Using New Stacked Marchand Baluns.
IEICE Transactions 90-C(4): 823-828 (2007) |
| 2006 |
| 8 |  | Ivan Chee Hong Lai,
Hideyuki Tanimoto,
Minoru Fujishima:
Characterization of High Q Transmission Line Structure for Advanced CMOS Processes.
IEICE Transactions 89-C(12): 1872-1879 (2006) |
| 2004 |
| 7 |  | Ken Yamamoto,
Takayasu Norimatsu,
Minoru Fujishima:
High-speed and wide-tuning-range LC frequency dividers.
ISCAS (4) 2004: 361-364 |
| 2003 |
| 6 |  | Ken Yamamoto,
Minoru Fujishima,
Koichiro Hoh:
Optimization of shield structures in analog integrated circuits.
ISCAS (1) 2003: 753-756 |
| 5 |  | Minoru Fujishima,
Kaoru Saito,
M. Onouchi,
Koichiro Hoh:
High-speed processor for quantum-computing emulation and its applications.
ISCAS (4) 2003: 884-887 |
| 2002 |
| 4 |  | Shin-ichi O'uchi,
Minoru Fujishima,
Koichiro Hoh:
An 8-qubit quantum-circuit processor.
ISCAS (5) 2002: 209-212 |
| 1999 |
| 3 |  | Takahiro Irita,
Takayuki Ogura,
Minoru Fujishima,
Koichiro Hoh:
Microprocessor architecture utilizing redundant-binary operation.
Systems and Computers in Japan 30(13): 106-115 (1999) |
| 1998 |
| 2 |  | Teppei Tsujita,
Takahiro Irita,
Minoru Fujishima,
Koichiro Hoh:
Self-oscillating chaos generator using CMOS multivibrator.
KES (1) 1998: 213-217 |
| 1 |  | Koichiro Hoh,
Takahiro Irita,
Teppei Tsujita,
Minoru Fujishima:
Generation of chaos with simple sets of semiconductor devices.
KES (3) 1998: 250-259 |