 | 2009 |
| 10 |  | Masaaki Ohtsuki,
Masato Kawai,
Masahiro Fukui:
An Efficient Algorithm for RTL Power Macro-Modeling and Library Building.
IEICE Transactions 92-C(4): 500-507 (2009) |
| 2008 |
| 9 |  | Tatsuya Koyagi,
Masahiro Fukui,
Resve Saleh:
Delay macromodeling and estimation for RTL.
ISCAS 2008: 2430-2433 |
| 8 |  | Yoshiyuki Kawakami,
Makoto Terao,
Masahiro Fukui,
Shuji Tsukiyama:
A Power Grid Optimization Algorithm by Observing Timing Error Risk by IR Drop.
IEICE Transactions 91-A(12): 3423-3430 (2008) |
| 2007 |
| 7 |  | Takeshi Taoka,
Makoto Manabe,
Masahiro Fukui:
An Efficient Curvature Lane Recognition Algorithm by Piecewise Linear Approach.
VTC Spring 2007: 2530-2534 |
| 6 |  | Masahiro Fukui,
Sayaka Iwakoshi,
Tatsuya Koyagi:
A Power Modeling and Optimization Scheme for Future Ultra Small Size Electric Systems.
IEICE Transactions 90-C(10): 1900-1908 (2007) |
| 2006 |
| 5 |  | Masaya Yoshikawa,
Masahiro Fukui,
Hidekazu Terai:
Immune Algorithm Processor.
Computers and Their Applications 2006: 13-18 |
| 2001 |
| 4 |  | Shuji Tsukiyama,
Masakazu Tanaka,
Masahiro Fukui:
A statistical static timing analysis considering correlations between delays.
ASP-DAC 2001: 353-358 |
| 1995 |
| 3 |  | Masahiro Fukui,
Noriko Shinomiya,
Toshiro Akino:
A new layout synthesis for leaf cell design.
ASP-DAC 1995 |
| 1987 |
| 2 |  | Masahiro Fukui,
A. Yamamoto,
R. Yamaguchi,
Sigeru Hayama,
Y. Mano:
A Block Interconnection Algorithm for Hierarchical Layout System.
IEEE Trans. on CAD of Integrated Circuits and Systems 6(3): 383-391 (1987) |
| 1983 |
| 1 |  | Shuji Tsukiyama,
Ikuo Harada,
Masahiro Fukui,
Isao Shirakawa:
A New Global Router for Gate Array LSIsi.
IEEE Trans. on CAD of Integrated Circuits and Systems 2(4): 313-321 (1983) |