Frank K. Gürkaynak

	2009
19		Milos Krstic, Xin Fan, Eckhard Grass, Frank K. Gürkaynak: GALS for Bursty Data Transfer based on Clock Coupling. Electr. Notes Theor. Comput. Sci. 245: 103-113 (2009)
18		Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Ajay K. Verma, Seyed Hosein Attarzadeh Niaki, Chrysostomos Nicopoulos, Frank K. Gürkaynak, Philip Brisk, Yusuf Leblebici, Paolo Ienne: Field Programmable Compressor Trees: Acceleration of Multi-Input Addition on FPGAs. TRETS 2(2): (2009)
17		Francesco Regazzoni, Thomas Eisenbarth, Axel Poschmann, Johann Großschädl, Frank K. Gürkaynak, Marco Macchetti, Zeynep Toprak Deniz, Laura Pozzi, Christof Paar, Yusuf Leblebici, Paolo Ienne: Evaluating Resistance of MCML Technology to Power Analysis Attacks Using a Simulation-Based Methodology. Transactions on Computational Science 4: 230-243 (2009)
	2008
16		Seyed Hosein Attarzadeh Niaki, Alessandro Cevrero, Philip Brisk, Chrysostomos Nicopoulos, Frank K. Gürkaynak, Yusuf Leblebici, Paolo Ienne: Design space exploration for field programmable compressor trees. CASES 2008: 207-216
15		Carlotta Guiducci, Alexandre Schmid, Frank K. Gürkaynak, Yusuf Leblebici: Novel Front-End Circuit Architectures for Integrated Bio-Electronic Interfaces. DATE 2008: 1328-1333
14		Stéphane Badel, Erdem Guleyupoglu, Ozgur Inac, Anna Pena Martinez, Paolo Vietti, Frank K. Gürkaynak, Yusuf Leblebici: A Generic Standard Cell Design Methodology for Differential Circuit Styles. DATE 2008: 843-848
13		Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Ajay K. Verma, Philip Brisk, Frank K. Gürkaynak, Yusuf Leblebici, Paolo Ienne: Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs. FPGA 2008: 181-190
12		Armin Tajalli, Frank K. Gürkaynak, Yusuf Leblebici, Massimo Alioto, Elizabeth J. Brauer: Improving the power-delay product in SCL circuits using source follower output stage. ISCAS 2008: 145-148
	2007
11		Milos Stanisavljevic, Frank K. Gürkaynak, Alexandre Schmid, Yusuf Leblebici, Maria Gabrani: Design and realization of a fault-tolerant 90nm CMOS cryptographic engine capable of performing under massive defect density. ACM Great Lakes Symposium on VLSI 2007: 204-207
10		Milos Krstic, Eckhard Grass, Frank K. Gürkaynak, Pascal Vivet: Globally Asynchronous, Locally Synchronous Circuits: Overview and Outlook. IEEE Design & Test of Computers 24(5): 430-441 (2007)
	2006
9		Frank K. Gürkaynak, Stephan Oetiker, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner: GALS at ETH Zurich: Success or Failure. ASYNC 2006: 150-159
8		Frank K. Gürkaynak, Stephan Oetiker, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner: Design Challenges for a Differential-Power-Analysis Aware GALS-based AES Crypto ASIC. Electr. Notes Theor. Comput. Sci. 146(2): 133-149 (2006)
	2004
7		Frank K. Gürkaynak, Andreas Burg, Norbert Felber, Wolfgang Fichtner, D. Gasser, F. Hug, Hubert Kaeslin: A 2 Gb/s balanced AES crypto-chip implementation. ACM Great Lakes Symposium on VLSI 2004: 39-44
6		Siddika Berna Örs, Frank K. Gürkaynak, Elisabeth Oswald, Bart Preneel: Power-Analysis Attack on an ASIC AES implementation. ITCC (2) 2004: 546-552
	2003
5		Thomas Villiger, Hubert Kaeslin, Frank K. Gürkaynak, Stephan Oetiker, Wolfgang Fichtner: Self-Timed Ring for Globally-Asynchronous Locally-Synchronous Systems. ASYNC 2003: 141-150
4		Andreas Burg, Frank K. Gürkaynak, Hubert Kaeslin, Wolfgang Fichtner: Variable delay ripple carry adder with carry chain interrupt detection. ISCAS (5) 2003: 113-116
	2002
3		Thomas Villiger, Stephan Oetiker, Frank K. Gürkaynak, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner: A Functional Test Methodology for Globally-Asynchronous Locally-Synchronous Systems. ASYNC 2002: 181-189
2		A. K. Lutz, J. Treichler, Frank K. Gürkaynak, Hubert Kaeslin, G. Basler, Antonia Erni, S. Reichmuth, P. Rommens, Stephan Oetiker, Wolfgang Fichtner: 2Gbit/s Hardware Realizations of RIJNDAEL and SERPENT: A Comparative Analysis. CHES 2002: 144-158
	1999
1		Ilhan Hatirnaz, Frank K. Gürkaynak, Yusuf Leblebici: Realization of a programmable rank-order filter architecture using capacitive threshold logic gates. ISCAS (1) 1999: 435-438

Coauthor Index

1	Antonia Albani (Antonia Erni)	[2]
2	Massimo Alioto	[12]
3	Panagiotis Athanasopoulos	[13] [18]
4	Stéphane Badel	[14]
5	G. Basler	[2]
6	Elizabeth J. Brauer	[12]
7	Philip Brisk	[13] [16] [18]
8	Andreas Burg	[4] [7]
9	Alessandro Cevrero	[13] [16] [18]
10	Zeynep Toprak Deniz	[17]
11	Thomas Eisenbarth	[17]
12	Xin Fan	[19]
13	Norbert Felber	[3] [7] [8] [9]
14	Wolfgang Fichtner	[2] [3] [4] [5] [7] [8] [9]
15	Maria Gabrani	[11]
16	D. Gasser	[7]
17	Eckhard Grass	[10] [19]
18	Johann Großschädl	[17]
19	Carlotta Guiducci	[15]
20	Erdem Guleyupoglu	[14]
21	Ilhan Hatirnaz	[1]
22	F. Hug	[7]
23	Paolo Ienne	[13] [16] [17] [18]
24	Ozgur Inac	[14]
25	Hubert Kaeslin	[2] [3] [4] [5] [7] [8] [9]
26	Milos Krstic	[10] [19]
27	Yusuf Leblebici	[1] [11] [12] [13] [14] [15] [16] [17] [18]
28	A. K. Lutz	[2]
29	Marco Macchetti	[17]
30	Anna Pena Martinez	[14]
31	Seyed Hosein Attarzadeh Niaki	[16] [18]
32	Chrysostomos Nicopoulos	[16] [18]
33	Stephan Oetiker	[2] [3] [5] [8] [9]
34	Siddika Berna Örs	[6]
35	Elisabeth Oswald	[6]
36	Christof Paar	[17]
37	Hadi Parandeh-Afshar	[13] [18]
38	Axel Poschmann	[17]
39	Laura Pozzi	[17]
40	Bart Preneel	[6]
41	Francesco Regazzoni	[17]
42	S. Reichmuth	[2]
43	P. Rommens	[2]
44	Alexandre Schmid	[11] [15]
45	Milos Stanisavljevic	[11]
46	Armin Tajalli	[12]
47	J. Treichler	[2]
48	Ajay K. Verma	[13] [18]
49	Paolo Vietti	[14]
50	Thomas Villiger	[3] [5]
51	Pascal Vivet	[10]

Colors in the list of coauthors